| /external/clang/test/CodeGenCXX/ |
| homogeneous-aggregates.cpp | 32 struct D4 : Base2, Base3 { // homogeneous aggregate
59 // ARM32: define arm_aapcs_vfpcc %struct.D4 @_Z7func_D42D4(%struct.D4 %x.coerce)
60 // ARM64: define %struct.D4 @_Z7func_D42D4([4 x double] %x.coerce)
61 D4 CC func_D4(D4 x) { return x; }
|
| /external/clang/test/CXX/special/class.copy/ |
| p23-cxx11.cpp | 111 struct D4 {
112 D4 &operator=(D4 &&) = default; // expected-note {{here}} expected-note {{copy assignment operator is implicitly deleted}}
132 template struct MoveAssign<D4>; // expected-note {{here}}
133 template struct MoveOrCopyAssign<D4>; // expected-note {{here}}
|
| /external/libxaac/decoder/armv7/ |
| ixheaacd_dct3_32.s | 67 VUZP.16 D4, D5
72 VMULL.U16 Q15, D4, D12
75 VMULL.U16 Q14, D4, D13
106 VUZP.16 D4, D5
128 VMULL.U16 Q15, D4, D12
130 VMULL.U16 Q14, D4, D13
162 VUZP.16 D4, D5
171 VMULL.U16 Q15, D4, D12
175 VMULL.U16 Q14, D4, D13
216 VUZP.16 D4, D
[all...] |
| ixheaacd_mps_synt_post_fft_twiddle.s | 40 VLD1.32 {D4, D5}, [R3]!
43 VMULL.S32 Q4, D0, D4
|
| ixheaacd_mps_synt_post_twiddle.s | 43 VSHRN.I64 D4, Q2, #31
49 VQADD.S32 D1, D4, D10
|
| ixheaacd_mps_synt_pre_twiddle.s | 43 VSHRN.I64 D4, Q2, #31
49 VQADD.S32 D1, D4, D10
|
| ixheaacd_calc_post_twid.s | 40 VLD1.32 {D4, D5}, [R1]!
43 VMULL.S32 Q4, D4, D0
46 VMULL.S32 Q7, D4, D2
|
| ixheaacd_calc_pre_twid.s | 39 VLD2.32 {D4, D5}, [R0]!
46 VNEG.S32 D5, D4
52 VMULL.S32 Q9, D2, D4
|
| ixheaacd_overlap_add1.s | 71 VLD1.32 {D4, D5}, [R1]!
80 VMULL.S32 Q13, D4, D14
101 VMULL.S32 Q0, D14, D4
118 VLD1.32 {D4, D5}, [R1]!
145 VMULL.S32 Q8, D4, D14
155 VMULL.S32 Q0, D4, D14
162 VLD1.32 {D4, D5}, [R1]!
195 VMULL.S32 Q8, D4, D14
205 VMULL.S32 Q0, D4, D14
222 VLD1.32 {D4, D5}, [R1]
[all...] |
| ia_xheaacd_mps_mulshift.s | 33 VQDMULL.S32 Q4, D0, D4
|
| ixheaacd_esbr_qmfsyn64_winadd.s | 54 VLD1.32 {D4, D5}, [R0], R8
57 VMLAL.S32 Q13, D6, D4
90 VLD1.32 {D4, D5}, [R1], R8
95 VMLAL.S32 Q13, D6, D4
147 VLD1.32 {D4, D5}, [R0], R8
150 VMLAL.S32 Q13, D6, D4
183 VLD1.32 {D4, D5}, [R1], R8
188 VMLAL.S32 Q13, D6, D4
233 VLD1.32 {D4, D5}, [R0], R8
239 VMLAL.S32 Q13, D6, D4
[all...] |
| ixheaacd_mps_synt_out_calc.s | 24 VLD2.32 {D4, D5}, [R3]!
30 VMULL.S32 Q4, D0, D4
|
| ixheaacd_dec_DCT2_64_asm.s | 89 VSWP D4, D5
122 VSWP D4, D5
166 VSWP D4, D5
216 VSWP D4, D5
323 VST1.16 D4[0], [R1]!
331 VLD2.16 {D4, D5}, [R7]!
336 VMULL.U16 Q14, D0, D4
340 VMLAL.S16 Q14, D1, D4
345 VMLAL.U16 Q13, D2, D4
348 VMLAL.S16 Q13, D3, D4
[all...] |
| ixheaacd_pre_twiddle_compute.s | 114 VLD4.16 {D4, D5, D6, D7}, [R1], R8
125 VMULL.U16 Q14, D4, D9
127 VMULL.U16 Q12, D4, D8
176 VLD4.16 {D4, D5, D6, D7}, [R1], R8
192 VMULL.U16 Q14, D4, D9
196 VMULL.U16 Q12, D4, D8
240 VLD4.16 {D4, D5, D6, D7}, [R1], R8
256 VMULL.U16 Q14, D4, D9
260 VMULL.U16 Q12, D4, D8
308 VMOV.S32 D4, #0x0000000
[all...] |
| ixheaacd_overlap_add2.s | 56 VREV64.16 D4, D6
64 VMLSL.U16 Q13, D4, D3
85 VREV64.16 D4, D6
86 VMLSL.U16 Q13, D4, D3
169 VLD2.16 {D4, D5}, [R1]!
172 VMLSL.U16 Q13, D4, D2
186 VMLSL.U16 Q13, D4, D2
215 VLD2.16 {D4, D5}, [R1]!
222 VMLSL.U16 Q13, D4, D2
|
| /external/clang/test/CXX/special/class.dtor/ |
| p5-0x.cpp | 102 struct D4 { // expected-note {{virtual destructor requires an unambiguous, accessible 'operator delete'}}
103 virtual ~D4() = default; // expected-note {{implicitly deleted here}}
105 } d4; // expected-error {{deleted function}} variable in typeref:struct:D4
|
| /external/libhevc/common/arm/ |
| ihevc_sao_band_offset_luma.s | 115 VLD1.8 D4,[r14]! @band_table.val[3]
134 VADD.I8 D8,D4,D31 @band_table.val[3] = vadd_u8(band_table.val[3], band_pos)
145 VADD.I8 D4,D8,D26 @band_table.val[3] = vadd_u8(band_table.val[3], vdup_n_u8(pi1_sao_offset[4]))
150 VCLE.U8 D12,D4,D29 @vcle_u8(band_table.val[3], vdup_n_u8(16))
153 VORR.U8 D4,D4,D12 @band_table.val[3] = vorr_u8(band_table.val[3], au1_cmp)
163 VAND.U8 D4,D4,D12 @band_table.val[3] = vand_u8(band_table.val[3], au1_cmp)
209 VTBX.8 D13,{D1-D4},D14 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, band_pos))
212 VTBX.8 D15,{D1-D4},D16 @vtbx4_u8(au1_cur_row, band_table, vsub_u8(au1_cur_row, band_pos)
[all...] |
| ihevc_resi_trans_32x32_a9q.s | 165 VLD1.U8 {D4,D5},[R1]! @LOAD 1-16 pred row 1
169 VSUBL.U8 Q8,D0,D4 @ Get residue 1-8 row 1 -- dual issued with prev. instr. 2nd cycle
187 VABDL.U8 Q15,D0,D4
211 VSWP D4,D5 @ Q2: 24 23 22 21 20 19 18 17 row 2
231 VMOV.S16 D1,D4
252 VREV32.16 D4,D27
254 @ D4 R1eee[3] R1eee[2] R2eee[3] R2eee[2]
256 VNEG.S16 D5,D4
267 VTRN.S16 D4,D5
271 VDUP.S32 D8,D4[0] @ R1eeee[0] R1eeeo[0] R1eeee[0] R1eeeo[0
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/ |
| Filt_6k_7k_neon.s | 44 VLD1.S16 {D4, D5, D6, D7}, [r0]!
47 VST1.S16 {D4, D5, D6}, [r1]!
112 VMLAL.S16 Q9,D12,D4[0]
114 VMLAL.S16 Q11,D13,D4[0]
134 VMLAL.S16 Q9,D12,D4[1]
136 VMLAL.S16 Q11,D13,D4[1]
156 VMLAL.S16 Q9,D12,D4[2]
158 VMLAL.S16 Q11,D13,D4[2]
178 VMLAL.S16 Q9,D12,D4[3]
180 VMLAL.S16 Q11,D13,D4[3
[all...] |
| syn_filt_neon.s | 62 VLD1.S16 {D4, D5, D6, D7}, [r10]! @ first 16 temp_p
71 VMULL.S16 Q5, D3, D4
75 VEXT.8 D4, D4, D5, #2
|
| /external/clang/test/Sema/ |
| warn-duplicate-enum.c | 25 D4 = D2, // no warning
|
| /device/google/bonito/nfc/ |
| libnfc-nxp.bonito.conf | 130 84, 01, 0A, C4, CC, 03, 0A, C6, 89, 01, 0B, C5, D4, 03, 0B, C7, 92, 01, 0C,
134 CC, 01, 15, 4B, D4, 01, 16, 4E, D7, 01, 17, 45, A2, 01, 18, 46, A6, 01, 19,
172 A0, D4, 01, 00,
|
| libnfc-nxp.sargo.conf | 130 84, 01, 0A, C4, CC, 03, 0A, C6, 89, 01, 0B, C5, D4, 03, 0B, C7, 92, 01, 0C,
134 CC, 01, 15, 4B, D4, 01, 16, 4E, D7, 01, 17, 45, A2, 01, 18, 46, A6, 01, 19,
172 A0, D4, 01, 00,
|
| /device/google/crosshatch/nfc/ |
| libnfc-nxp.blueline.conf | 116 84, 01, 0A, C4, CC, 03, 0A, C6, 89, 01, 0B, C5, D4, 03, 0B, C7, 92, 01, 0C,
120 CC, 01, 15, 4B, D4, 01, 16, 4E, D7, 01, 17, 45, A2, 01, 18, 46, A6, 01, 19,
171 A0, D4, 01, 00,
|
| libnfc-nxp.crosshatch.conf | 116 84, 01, 0A, C4, CC, 03, 0A, C6, 89, 01, 0B, C5, D4, 03, 0B, C7, 92, 01, 0C,
120 CC, 01, 15, 4B, D4, 01, 16, 4E, D7, 01, 17, 45, A2, 01, 18, 46, A6, 01, 19,
170 A0, D4, 01, 00,
|
