| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/Include/ |
| EfiUiLib.h | 209 OUT UINT8 *EndIdx OPTIONAL
222 EndIdx - index on which the parsing stopped. It points to the
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| MachineOutliner.cpp | 139 /// Every leaf node must have its \p EndIdx incremented at the end of every
143 unsigned *EndIdx = nullptr;
196 assert(*EndIdx != EmptyIdx && "EndIdx is undefined!");
200 return *EndIdx - StartIdx + 1;
203 SuffixTreeNode(unsigned StartIdx, unsigned *EndIdx, SuffixTreeNode *Link,
205 : StartIdx(StartIdx), EndIdx(EndIdx), Link(Link), Parent(Parent) {}
304 /// \param EndIdx The end index of this node's associated string.
309 unsigned EndIdx, unsigned Edge)
[all...] |
| PostRASchedulerList.cpp | 161 void setEndIndex(unsigned EndIdx) { EndIndex = EndIdx; }
|
| StackColoring.cpp | [all...] |
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/Dxe/EfiUiLib/ |
| EfiUiLib.c | 30 OUT UINT8 *EndIdx OPTIONAL
43 EndIdx - index on which the parsing stopped. It points to the
76 if (EndIdx != NULL) {
77 *EndIdx = i;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 862 unsigned StartIdx, EndIdx;
875 : V(V), RLAmt(R), StartIdx(S), EndIdx(E), Repl32(false), Repl32CR(false),
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ExpandPseudoInsts.cpp | 302 int EndIdx = NotSet;
312 EndIdx = Idx;
316 if (StartIdx == NotSet || EndIdx == NotSet)
327 if (StartIdx > EndIdx) {
328 std::swap(StartIdx, EndIdx);
343 if ((Idx < StartIdx || EndIdx < Idx) && Chunk != Outside) {
354 } else if (Idx > StartIdx && Idx < EndIdx && Chunk != Inside) {
[all...] |
| AArch64InstrInfo.cpp | 756 for (unsigned OpIdx = 0, EndIdx = Instr.getNumOperands(); OpIdx < EndIdx;
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/GlobalISel/ |
| RegisterBankInfo.cpp | 179 for (unsigned OpIdx = 0, EndIdx = MI.getNumOperands(); OpIdx != EndIdx;
409 EndIdx = OpdMapper.getInstrMapping().getNumOperands();
410 OpIdx != EndIdx; ++OpIdx) {
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| AArch64ExpandPseudoInsts.cpp | 272 int EndIdx = NotSet;
282 EndIdx = Idx;
286 if (StartIdx == NotSet || EndIdx == NotSet)
297 if (StartIdx > EndIdx) {
298 std::swap(StartIdx, EndIdx);
313 if ((Idx < StartIdx || EndIdx < Idx) && Chunk != Outside) {
324 } else if (Idx > StartIdx && Idx < EndIdx && Chunk != Inside) {
[all...] |
| AArch64InstrInfo.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | [all...] |
| SubtargetEmitter.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | [all...] |
| SubtargetEmitter.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/DWARF/ |
| DWARFUnit.cpp | 581 for (size_t I = getDIEIndex(Die) + 1, EndIdx = DieArray.size(); I < EndIdx;
624 for (size_t I = getDIEIndex(Die) + 1, EndIdx = DieArray.size(); I < EndIdx;
|
| /external/llvm/lib/CodeGen/GlobalISel/ |
| RegisterBankInfo.cpp | 338 for (unsigned OpIdx = 0, EndIdx = MI.getNumOperands(); OpIdx != EndIdx;
|
| /external/llvm/lib/CodeGen/ |
| PostRASchedulerList.cpp | 161 void setEndIndex(unsigned EndIdx) { EndIndex = EndIdx; }
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineVectorOps.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| InstCombineVectorOps.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| LiveIntervalAnalysis.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
