| /art/runtime/arch/mips/ |
| registers_mips.h | 87 F18 = 18,
|
| callee_save_frame_mips.h | 69 (1 << art::mips::F16) | (1 << art::mips::F17) | (1 << art::mips::F18) | (1 << art::mips::F19);
79 (1 << art::mips::F16) | (1 << art::mips::F17) | (1 << art::mips::F18) | (1 << art::mips::F19) |
|
| context_mips.cc | 101 fprs_[F18] = nullptr;
|
| /art/runtime/arch/mips64/ |
| registers_mips64.h | 88 F18 = 18,
|
| callee_save_frame_mips64.h | 56 (1 << art::mips64::F18) | (1 << art::mips64::F19);
69 (1 << art::mips64::F18) | (1 << art::mips64::F19) | (1 << art::mips64::F20) |
|
| context_mips64.cc | 104 fprs_[F18] = nullptr;
|
| /device/google/cuttlefish_common/host/frontend/vnc_server/ |
| keysyms.h | 33 F15 = 0xffcc, F16 = 0xffcd, F17 = 0xffce, F18 = 0xffcf,
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/MCTargetDesc/ |
| PPCBaseInfo.h | 49 case R18: case X18: case F18: case V18: case CR4EQ: return 18;
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCFrameLowering.h | 147 {PPC::F18, -112},
224 {PPC::F18, -112},
|
| PPCRegisterInfo.cpp | 113 PPC::F18, PPC::F19, PPC::F20, PPC::F21,
139 PPC::F18, PPC::F19, PPC::F20, PPC::F21,
167 PPC::F18, PPC::F19, PPC::F20, PPC::F21,
193 PPC::F18, PPC::F19, PPC::F20, PPC::F21,
|
| /art/compiler/jni/quick/mips64/ |
| calling_convention_mips64.cc | 36 F12, F13, F14, F15, F16, F17, F18, F19
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/MCTargetDesc/ |
| MipsBaseInfo.h | 72 case Mips::S2: case Mips::S2_64: case Mips::F18: case Mips::D18_64:
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| FPMover.cpp | 64 SP::F16, SP::F18, SP::F20, SP::F22, SP::F24, SP::F26, SP::F28, SP::F30
|
| /art/compiler/jni/quick/mips/ |
| calling_convention_mips.cc | 48 static const FRegister kManagedFArgumentRegisters[] = { F8, F10, F12, F14, F16, F18 };
|
| /art/compiler/optimizing/ |
| code_generator_mips64.h | 37 { F13, F14, F15, F16, F17, F18, F19 };
49 { F12, F13, F14, F15, F16, F17, F18, F19 };
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| code_generator_mips.h | 39 { F8, F10, F12, F14, F16, F18 };
|
| /external/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 86 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
128 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
148 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/ |
| PPCDisassembler.cpp | 86 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
139 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
159 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| MipsGenCallingConv.inc | 166 Mips::F12, Mips::F13, Mips::F14, Mips::F15, Mips::F16, Mips::F17, Mips::F18, Mips::F19
508 Mips::F0, Mips::F1, Mips::F2, Mips::F3, Mips::F4, Mips::F5, Mips::F6, Mips::F7, Mips::F8, Mips::F9, Mips::F10, Mips::F11, Mips::F12, Mips::F13, Mips::F14, Mips::F15, Mips::F16, Mips::F17, Mips::F18, Mips::F19
520 Mips::F0, Mips::F2, Mips::F4, Mips::F6, Mips::F8, Mips::F10, Mips::F12, Mips::F14, Mips::F16, Mips::F18
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Efi/Protocol/DebugSupport/ |
| DebugSupport.h | 372 UINT64 F18[2];
|
| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| MipsRegisterInfo.cpp | 99 case Mips::S2: case Mips::S2_64: case Mips::F18: case Mips::D18_64:
|
| /device/linaro/bootloader/edk2/MdePkg/Include/Protocol/ |
| DebugSupport.h | 341 UINT64 F18[2];
|
| /external/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 81 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
120 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
139 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/AsmParser/ |
| PPCAsmParser.cpp | 81 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
140 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
159 PPC::F16, PPC::F17, PPC::F18, PPC::F19,
[all...] |
| /art/compiler/utils/mips/ |
| assembler_mips32r5_test.cc | 175 fp_registers_.push_back(new mips::FRegister(mips::F18));
|
