/external/llvm/lib/Target/Mips/ |
MipsSEInstrInfo.h | 93 unsigned LoOpc, unsigned HiOpc,
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MipsSEInstrInfo.cpp | 556 unsigned LoOpc, 567 MachineInstrBuilder LoInst = BuildMI(MBB, I, DL, get(LoOpc));
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
MipsSEInstrInfo.h | 96 unsigned LoOpc, unsigned HiOpc,
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MipsSEInstrInfo.cpp | 714 unsigned LoOpc, 725 MachineInstrBuilder LoInst = BuildMI(MBB, I, DL, get(LoOpc)); [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonCopyToCombine.cpp | 188 unsigned LoOpc = LowRegInst.getOpcode(); 190 (void)LoOpc; // Fix compiler warning 192 (LoOpc == Hexagon::A2_tfr || LoOpc == Hexagon::A2_tfrsi) &&
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
HexagonCopyToCombine.cpp | 188 unsigned LoOpc = LowRegInst.getOpcode(); 201 verifyOpc(LoOpc); 203 if (HiOpc == Hexagon::V6_vassign || LoOpc == Hexagon::V6_vassign) 204 return HiOpc == LoOpc; [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeIntegerTypes.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeIntegerTypes.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
SIInstrInfo.cpp | [all...] |
SIISelLowering.cpp | [all...] |