| /external/u-boot/board/spear/x600/ |
| x600.c | 83 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00);
|
| /device/linaro/bootloader/OpenPlatformPkg/Drivers/Net/Phy/MvPhyDxe/ |
| MvPhyDxe.h | 44 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
|
| /external/u-boot/drivers/net/phy/ |
| realtek.c | 93 reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
98 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, reg);
|
| micrel_ksz90x1.c | 267 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, ctrl1000);
359 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0);
|
| phy.c | 93 adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000);
112 err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv);
314 MDIO_DEVAD_NONE, MII_CTRL1000) << 2;
|
| /bionic/libc/kernel/uapi/linux/ |
| mii.h | 30 #define MII_CTRL1000 0x09
|
| /external/kernel-headers/original/uapi/linux/ |
| mii.h | 23 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
|
| /external/u-boot/include/linux/ |
| mii.h | 20 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
|
| /external/u-boot/drivers/net/ |
| davinci_emac.c | 344 davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val);
347 davinci_eth_phy_write(phy_addr, MII_CTRL1000, val);
348 davinci_eth_phy_read(phy_addr, MII_CTRL1000, &val);
|
| ravb.c | 328 reg = phy_read(phydev, -1, MII_CTRL1000);
330 phy_write(phydev, -1, MII_CTRL1000, reg);
|
| ag7xxx.c | 713 ret = ag7xxx_mdio_write(priv->bus, port, 0, MII_CTRL1000,
|
| /external/u-boot/board/udoo/ |
| udoo.c | 76 phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, 0x1c00);
|
| /external/u-boot/drivers/qe/ |
| uec_phy.c | 312 adv = uec_phy_read(mii_info, MII_CTRL1000);
319 uec_phy_write(mii_info, MII_CTRL1000, adv);
|
| /external/u-boot/drivers/usb/eth/ |
| r8152.h | 490 #define MII_CTRL1000 0x09 /* 1000BASE-T control */
|
| r8152.c | 884 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
938 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
[all...] |
| asix88179.c | 358 asix_write_cmd(dev, AX_ACCESS_PHY, 0x03, MII_CTRL1000, 2, &adv);
|
