| /external/u-boot/arch/arm/mach-tegra/tegra30/ |
| pinmux.c | 137 PIN(GMI_WP_N_PC7, RSVD1, NAND, GMI, GMI_ALT),
138 PIN(GMI_IORDY_PI5, RSVD1, NAND, GMI, RSVD4),
139 PIN(GMI_WAIT_PI7, RSVD1, NAND, GMI, RSVD4),
140 PIN(GMI_ADV_N_PK0, RSVD1, NAND, GMI, RSVD4),
141 PIN(GMI_CLK_PK1, RSVD1, NAND, GMI, RSVD4),
142 PIN(GMI_CS0_N_PJ0, RSVD1, NAND, GMI, DTV),
143 PIN(GMI_CS1_N_PJ2, RSVD1, NAND, GMI, DTV),
144 PIN(GMI_CS2_N_PK3, RSVD1, NAND, GMI, RSVD4),
145 PIN(GMI_CS3_N_PK4, RSVD1, NAND, GMI, GMI_ALT),
146 PIN(GMI_CS4_N_PK2, RSVD1, NAND, GMI, RSVD4)
[all...] |
| /external/u-boot/arch/arm/mach-tegra/tegra114/ |
| pinmux.c | 140 PIN(GMI_WP_N_PC7, RSVD1, NAND, GMI, GMI_ALT),
142 PIN(GMI_WAIT_PI7, SPI4, NAND, GMI, DTV),
143 PIN(GMI_ADV_N_PK0, RSVD1, NAND, GMI, TRACE),
144 PIN(GMI_CLK_PK1, SDMMC2, NAND, GMI, TRACE),
145 PIN(GMI_CS0_N_PJ0, RSVD1, NAND, GMI, USB),
146 PIN(GMI_CS1_N_PJ2, RSVD1, NAND, GMI, SOC),
147 PIN(GMI_CS2_N_PK3, SDMMC2, NAND, GMI, TRACE),
148 PIN(GMI_CS3_N_PK4, SDMMC2, NAND, GMI, GMI_ALT),
149 PIN(GMI_CS4_N_PK2, USB, NAND, GMI, TRACE),
150 PIN(GMI_CS6_N_PI3, NAND, NAND_ALT, GMI, SPI4)
[all...] |
| /external/u-boot/arch/arm/cpu/armv8/fsl-layerscape/doc/ |
| README.lsch3 | 125 from the location where it is stored(NOR, NAND, SD, SATA, USB)during
151 devices like SATA, USB, NAND, SD etc.
153 Booting from NAND
155 Booting from NAND requires two images, RCW and u-boot-with-spl.bin.
156 The difference between NAND boot RCW image and NOR boot image is the PBI
158 uses NAND device with 2KB/page, block size 128KB.
167 This command copies u-boot image from NAND device into OCRAM. The values need
171 on the NAND device. See reference manual for cfg_rcw_src.
172 SRC_ADDR is the offset of u-boot-with-spl.bin image in NAND device. In
178 RCW image should be written to the beginning of NAND device. Example of usin
[all...] |
| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| u-boot-nand_spl.lds | 54 #error unknown NAND controller
67 ASSERT(__init_end <= (0xfff00000 + RESET_VECTOR_OFFSET), "NAND bootstrap too big");
|
| u-boot-spl.lds | 90 #error unknown NAND controller
|
| /external/u-boot/drivers/memory/ |
| Kconfig | 14 asynchronuous memory devices like ASRAM, NOR and NAND memory. A total
|
| /external/u-boot/board/nvidia/cardhu/ |
| pinmux-config-cardhu.h | 204 DEFAULT_PINMUX(GMI_AD10_PH2, NAND, NORMAL, NORMAL, OUTPUT), /* LCD1_BL_EN */
288 DEFAULT_PINMUX(GMI_AD12_PH4, NAND, UP, NORMAL, INPUT),
291 DEFAULT_PINMUX(GMI_AD14_PH6, NAND, NORMAL, NORMAL, OUTPUT),
309 DEFAULT_PINMUX(GMI_WAIT_PI7, NAND, UP, TRISTATE, OUTPUT),
310 DEFAULT_PINMUX(GMI_ADV_N_PK0, NAND, NORMAL, TRISTATE, OUTPUT),
311 DEFAULT_PINMUX(GMI_CLK_PK1, NAND, NORMAL, TRISTATE, OUTPUT),
312 DEFAULT_PINMUX(GMI_CS3_N_PK4, NAND, NORMAL, NORMAL, OUTPUT),
313 DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, UP, NORMAL, INPUT),
314 DEFAULT_PINMUX(GMI_AD0_PG0, NAND, NORMAL, TRISTATE, OUTPUT),
315 DEFAULT_PINMUX(GMI_AD1_PG1, NAND, NORMAL, TRISTATE, OUTPUT)
[all...] |
| /external/u-boot/board/toradex/apalis_t30/ |
| pinmux-config-apalis_t30.h | 214 DEFAULT_PINMUX(GMI_AD10_PH2, NAND, DOWN, TRISTATE, OUTPUT), /* NC */
304 DEFAULT_PINMUX(GMI_AD12_PH4, NAND, DOWN, TRISTATE, OUTPUT), /* NC */
305 DEFAULT_PINMUX(GMI_AD14_PH6, NAND, DOWN, TRISTATE, OUTPUT), /* NC */
312 DEFAULT_PINMUX(GMI_WAIT_PI7, NAND, DOWN, TRISTATE, OUTPUT),
313 DEFAULT_PINMUX(GMI_ADV_N_PK0, NAND, DOWN, TRISTATE, OUTPUT),
314 DEFAULT_PINMUX(GMI_CLK_PK1, NAND, DOWN, TRISTATE, OUTPUT),
315 DEFAULT_PINMUX(GMI_CS3_N_PK4, NAND, DOWN, TRISTATE, OUTPUT),
316 DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, DOWN, TRISTATE, OUTPUT),
317 DEFAULT_PINMUX(GMI_AD0_PG0, NAND, DOWN, TRISTATE, OUTPUT),
318 DEFAULT_PINMUX(GMI_AD1_PG1, NAND, DOWN, TRISTATE, OUTPUT)
[all...] |
| /external/u-boot/board/toradex/colibri_t30/ |
| pinmux-config-colibri_t30.h | 205 DEFAULT_PINMUX(GMI_AD10_PH2, NAND, NORMAL, NORMAL, OUTPUT), /* LCD1_BL_EN */
302 DEFAULT_PINMUX(GMI_AD12_PH4, NAND, UP, NORMAL, INPUT),
305 DEFAULT_PINMUX(GMI_AD14_PH6, NAND, NORMAL, NORMAL, OUTPUT),
323 DEFAULT_PINMUX(GMI_WAIT_PI7, NAND, UP, TRISTATE, OUTPUT),
324 DEFAULT_PINMUX(GMI_ADV_N_PK0, NAND, NORMAL, TRISTATE, OUTPUT),
325 DEFAULT_PINMUX(GMI_CLK_PK1, NAND, NORMAL, TRISTATE, OUTPUT),
326 DEFAULT_PINMUX(GMI_CS3_N_PK4, NAND, NORMAL, NORMAL, OUTPUT),
327 DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, UP, NORMAL, INPUT),
328 DEFAULT_PINMUX(GMI_AD0_PG0, NAND, NORMAL, TRISTATE, OUTPUT),
329 DEFAULT_PINMUX(GMI_AD1_PG1, NAND, NORMAL, TRISTATE, OUTPUT)
[all...] |
| /external/u-boot/arch/arm/mach-tegra/tegra20/ |
| pinmux.c | 285 PIN(ATA, IDE, NAND, GMI, RSVD4),
286 PIN(ATB, IDE, NAND, GMI, SDIO4),
287 PIN(ATC, IDE, NAND, GMI, SDIO4),
288 PIN(ATD, IDE, NAND, GMI, SDIO4),
308 PIN(KBCB, KBC, NAND, SDIO2, MIO),
309 PIN(KBCA, KBC, NAND, SDIO2, EMC_TEST0_DLL),
314 PIN(KBCE, KBC, NAND, OWR, RSVD4),
315 PIN(KBCF, KBC, NAND, TRACE, MIO),
349 PIN(ATE, IDE, NAND, GMI, RSVD4),
350 PIN(KBCC, KBC, NAND, TRACE, EMC_TEST1_DLL)
[all...] |
| /external/u-boot/board/avionic-design/common/ |
| pinmux-config-tamonten-ng.h | 358 DEFAULT_PINMUX(GMI_WAIT_PI7, NAND, UP, TRISTATE, OUTPUT),
359 DEFAULT_PINMUX(GMI_ADV_N_PK0, NAND, NORMAL, TRISTATE, OUTPUT),
360 DEFAULT_PINMUX(GMI_CLK_PK1, NAND, NORMAL, TRISTATE, OUTPUT),
361 DEFAULT_PINMUX(GMI_CS3_N_PK4, NAND, NORMAL, NORMAL, OUTPUT),
362 DEFAULT_PINMUX(GMI_CS7_N_PI6, NAND, UP, NORMAL, INPUT),
363 DEFAULT_PINMUX(GMI_AD0_PG0, NAND, NORMAL, TRISTATE, OUTPUT),
364 DEFAULT_PINMUX(GMI_AD1_PG1, NAND, NORMAL, TRISTATE, OUTPUT),
365 DEFAULT_PINMUX(GMI_AD2_PG2, NAND, NORMAL, TRISTATE, OUTPUT),
366 DEFAULT_PINMUX(GMI_AD3_PG3, NAND, NORMAL, TRISTATE, OUTPUT),
367 DEFAULT_PINMUX(GMI_AD4_PG4, NAND, NORMAL, TRISTATE, OUTPUT)
[all...] |
| /device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/PL35xSmc/ |
| InitializeSMC.asm | 37 // Write to set_cycle register(holding register for NOR 1 cycle register or NAND cycle register)
41 // Write to set_opmode register(holding register for NOR 1 opomode register or NAND opmode register)
|
| /external/u-boot/include/configs/ |
| omap3_beagle.h | 31 /* NAND */
52 /* NAND: SPL falcon mode configs */
90 "echo NAND boot disabled: No mtdids and/or mtdparts; " \
101 func(NAND, nand, 0)
215 "nandboot=if nand read ${loadaddr} kernel && nand read ${fdtaddr} dtb; then " \
216 "echo Booting uImage from NAND MTD 'kernel' partition ...; " \
|
| omap3_evm.h | 39 /* NAND */
59 /* NAND: SPL falcon mode configs */
85 "echo NAND boot disabled: No mtdids and/or mtdparts; " \
96 func(NAND, nand, 0)
165 "nandboot=if nand read ${loadaddr} kernel && nand read ${fdtaddr} dtb; then " \
166 "echo Booting uImage from NAND MTD 'kernel' partition ...; " \
|
| pcm051.h | 49 func(NAND, nand, 0)
|
| am335x_evm.h | 48 "nandroot=ubi0:rootfs rw ubi.mtd=NAND.file-system,2048\0" \
50 "nandboot=echo Booting from nand ...; " \
52 "nand read ${fdtaddr} NAND.u-boot-spl-os; " \
53 "nand read ${loadaddr} NAND.kernel; " \
92 func(NAND, nand, 0) \
201 /* NAND: device related configs */
208 /* NAND: driver related configs *
[all...] |
| /external/u-boot/arch/arm/mach-socfpga/ |
| spl.c | 50 case 0x2: /* NAND Flash (1.8V) */
51 case 0x3: /* NAND Flash (3.0V) */
52 socfpga_per_reset(SOCFPGA_RESET(NAND), 0);
|
| misc_gen5.c | 221 socfpga_per_reset(SOCFPGA_RESET(NAND), 0);
|
| /external/u-boot/arch/arm/mach-sunxi/ |
| dram_sunxi_dw.c | 126 MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64);
151 MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64);
181 MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64);
209 MBUS_CONF( NAND, true, HIGH, 0, 256, 128, 64);
|
| /external/u-boot/cmd/ |
| nvedit.c | 56 NAND|NVRAM|ONENAND|SATA|SPI_FLASH|REMOTE|UBI} or CONFIG_ENV_IS_NOWHERE
|
| /external/v8/src/ppc/ |
| constants-ppc.h | 265 /* VSX Logical NAND */ \
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.cpp | [all...] |
| /external/virglrenderer/src/ |
| vrend_renderer.c | [all...] |
