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Searched
refs:OffsetImm
(Results
1 - 12
of
12
) sorted by null
/external/swiftshader/third_party/LLVM/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp
329
// Offset is in OffsetReg or
OffsetImm
. If both are zero, no offset
331
const MCConstantExpr *
OffsetImm
; // Offset immediate value
332
unsigned OffsetRegNum; // Offset register num, when
OffsetImm
== NULL
681
return Memory.OffsetRegNum == 0 && Memory.
OffsetImm
== 0 &&
692
if (!Memory.
OffsetImm
) return true;
693
int64_t Val = Memory.
OffsetImm
->getValue();
712
if (!Memory.
OffsetImm
) return true;
713
int64_t Val = Memory.
OffsetImm
->getValue();
733
if (!Memory.
OffsetImm
) return true;
734
int64_t Val = Memory.
OffsetImm
->getValue()
[
all
...]
/external/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp
511
// Offset is in OffsetReg or
OffsetImm
. If both are zero, no offset
513
const MCConstantExpr *
OffsetImm
; // Offset immediate value
514
unsigned OffsetRegNum; // Offset register num, when
OffsetImm
== NULL
740
if(!Memory.
OffsetImm
|| Memory.OffsetRegNum) return false;
742
Val = Memory.
OffsetImm
->getValue();
[
all
...]
/external/llvm/lib/Target/AArch64/
AArch64LoadStoreOptimizer.cpp
667
int
OffsetImm
= getLdStOffsetOp(*RtMI).getImm();
670
assert(((
OffsetImm
& 1) == 0) && "Unexpected offset to merge");
671
OffsetImm
/= 2;
688
.addImm(
OffsetImm
)
777
.addImm(
OffsetImm
)
856
int
OffsetImm
= getLdStOffsetOp(*RtMI).getImm();
859
assert(!(
OffsetImm
% getMemScale(*RtMI)) &&
861
OffsetImm
/= getMemScale(*RtMI);
872
.addImm(
OffsetImm
)
[
all
...]
/external/llvm/lib/Target/ARM/
Thumb2SizeReduction.cpp
541
unsigned
OffsetImm
= 0;
543
OffsetImm
= MI->getOperand(2).getImm();
546
if ((
OffsetImm
& (Scale - 1)) ||
OffsetImm
> MaxOffset)
565
MIB.addImm(
OffsetImm
/ Scale);
[
all
...]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
Thumb2SizeReduction.cpp
433
unsigned
OffsetImm
= 0;
435
OffsetImm
= MI->getOperand(2).getImm();
438
if ((
OffsetImm
& (Scale - 1)) ||
OffsetImm
> MaxOffset)
451
MIB.addImm(
OffsetImm
/ Scale);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
Thumb2SizeReduction.cpp
570
unsigned
OffsetImm
= 0;
572
OffsetImm
= MI->getOperand(2).getImm();
575
if ((
OffsetImm
& (Scale - 1)) ||
OffsetImm
> MaxOffset)
594
MIB.addImm(
OffsetImm
/ Scale);
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
AArch64LoadStoreOptimizer.cpp
690
int
OffsetImm
= getLdStOffsetOp(*RtMI).getImm();
693
assert(((
OffsetImm
& 1) == 0) && "Unexpected offset to merge");
694
OffsetImm
/= 2;
704
.addImm(
OffsetImm
)
784
int
OffsetImm
= getLdStOffsetOp(*RtMI).getImm();
787
assert(!(
OffsetImm
% getMemScale(*RtMI)) &&
789
OffsetImm
/= getMemScale(*RtMI);
821
.addImm(
OffsetImm
)
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp
745
// Offset is in OffsetReg or
OffsetImm
. If both are zero, no offset
747
const MCConstantExpr *
OffsetImm
; // Offset immediate value
748
unsigned OffsetRegNum; // Offset register num, when
OffsetImm
== NULL
983
if(!Memory.
OffsetImm
|| Memory.OffsetRegNum) return false;
985
Val = Memory.
OffsetImm
->getValue();
[
all
...]
/external/swiftshader/third_party/subzero/src/
IceTargetLoweringMIPS32.cpp
[
all
...]
IceTargetLoweringARM32.cpp
[
all
...]
/external/llvm/lib/Target/AMDGPU/
SIInstrInfo.cpp
211
const MachineOperand *
OffsetImm
=
213
if (
OffsetImm
) {
219
Offset =
OffsetImm
->getImm();
269
const MachineOperand *
OffsetImm
=
272
Offset =
OffsetImm
->getImm();
277
const MachineOperand *
OffsetImm
=
279
if (!
OffsetImm
)
285
Offset =
OffsetImm
->getImm();
[
all
...]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
SIInstrInfo.cpp
273
const MachineOperand *
OffsetImm
=
275
if (
OffsetImm
) {
281
Offset =
OffsetImm
->getImm();
332
const MachineOperand *
OffsetImm
=
335
Offset =
OffsetImm
->getImm();
344
const MachineOperand *
OffsetImm
=
346
if (!
OffsetImm
)
352
Offset =
OffsetImm
->getImm();
[
all
...]
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