/external/u-boot/board/BuR/brppt1/ |
mux.c | 20 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDEN)}, 22 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 24 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, 31 {OFFSET(uart1_rtsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 33 {OFFSET(uart1_ctsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 35 {OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 37 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, 60 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, 62 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)} [all...] |
/external/u-boot/board/eets/pdu001/ |
mux.c | 20 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 26 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ 32 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ 38 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ 44 {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */ 50 {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */ 56 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 58 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
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/external/u-boot/board/phytec/pcm051/ |
mux.c | 26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 46 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 48 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ 55 {OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_SCLK */ 57 PULLUDEN | PULLUP_EN)}, /* SPI0_D0 */ 58 {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)}, /* SPI0_D1 */ 60 PULLUDEN | PULLUP_EN)}, /* SPI0_CS0 */ 97 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 98 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 99 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE * [all...] |
/external/u-boot/board/silica/pengwyn/ |
mux.c | 18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 27 PULLUDEN | SLEWCTRL)}, /* I2C0_DATA */ 29 PULLUDEN | SLEWCTRL)}, /* I2C0_SCLK */ 77 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 78 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 79 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ 80 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ 81 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
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/external/u-boot/board/tcl/sl50/ |
mux.c | 18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 24 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ 30 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ 36 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ 42 {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */ 48 {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */ 78 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 80 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ 86 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 88 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK * [all...] |
/external/u-boot/board/compulab/cm_t335/ |
mux.c | 18 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, 24 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, 26 {OFFSET(uart1_rtsn), (MODE(0) | PULLUDEN)}, 83 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 84 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 85 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ 86 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ 87 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ 97 {OFFSET(gpmc_csn3), (MODE(7) | PULLUDEN)}, /* GPIO2_0 */
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/external/u-boot/board/vscom/baltos/ |
mux.c | 26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 43 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 45 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ 50 {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)}, /* GPIO0_7 */ 96 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 97 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 98 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ 99 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ 100 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
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board.c | 334 {OFFSET(mii1_rxdv), (MODE(7) | PULLUDEN )}, /* GPIO3_4 */
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/external/u-boot/board/isee/igep003x/ |
mux.c | 24 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 50 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 51 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 52 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ 53 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ 54 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
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/external/u-boot/board/ti/am335x/ |
mux.c | 27 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 33 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ 39 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ 45 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ 51 {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */ 57 {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */ 109 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 111 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ 117 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 119 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK * [all...] |
/external/u-boot/board/BuR/brxre1/ |
mux.c | 20 {OFFSET(spi0_sclk), MODE(0) | PULLUDEN | RXACTIVE}, 22 {OFFSET(spi0_d0), MODE(0) | PULLUDEN | RXACTIVE}, 24 {OFFSET(spi0_d1), MODE(0) | PULLUDEN | RXACTIVE}, 26 {OFFSET(spi0_cs0), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, 28 {OFFSET(spi0_cs1), MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE}, 34 {OFFSET(uart1_ctsn), MODE(2) | PULLUDEN | PULLUP_EN}, 42 {OFFSET(uart1_rxd), MODE(2) | PULLUDEN | PULLUP_EN}, 88 {OFFSET(uart0_ctsn), (MODE(7) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 90 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)}, 92 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, [all...] |
/external/u-boot/board/siemens/pxm2/ |
mux.c | 24 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 41 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 42 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 43 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ 44 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ 45 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */ 47 {OFFSET(mcasp0_ahclkx), MODE(7) | PULLUDEN}, /* MCASP0_AHCLKX */ 53 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, 54 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, 59 {OFFSET(spi0_d1), (MODE(2) | RXACTIVE | PULLUDEN | SLEWCTRL)} [all...] |
/external/u-boot/arch/arm/mach-omap2/am33xx/ |
chilisom.c | 30 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 32 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ 47 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 48 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 49 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ 50 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ 51 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE */
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/external/u-boot/board/birdland/bav335x/ |
mux.c | 27 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 33 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */ 39 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */ 45 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ 51 {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */ 57 {OFFSET(lcd_data8), (MODE(4) | PULLUDEN)}, /* UART5_TXD */ 87 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 89 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ 95 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 97 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK * [all...] |
/external/u-boot/board/gumstix/pepper/ |
mux.c | 17 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 34 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)}, 36 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE | PULLUDEN | SLEWCTRL)},
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/external/u-boot/board/bosch/shc/ |
mux.c | 21 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_RXD */ 23 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_CTS */ 31 {OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART1_CTS */ 43 {OFFSET(mcasp0_aclkx), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_SCLK */ 44 {OFFSET(mcasp0_fsx), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_D0 */ 45 {OFFSET(mcasp0_axr0), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_D1 */ 46 {OFFSET(mcasp0_ahclkr), (MODE(3) | PULLUDEN | RXACTIVE)},/* SPI1_CS0 */ 118 {OFFSET(usb0_drvvbus), (MODE(0) | PULLUDEN)},
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/external/u-boot/board/siemens/draco/ |
mux.c | 23 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */ 29 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */ 35 PULLUDEN | SLEWCTRL)}, /* I2C_DATA */ 37 PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */ 52 {OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)}, /* NAND_CS0 */ 53 {OFFSET(gpmc_csn1), MODE(0) | PULLUDEN | PULLUP_EN}, /* NAND_CS1 */ 54 {OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */ 55 {OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)}, /* NAND_OE */ 56 {OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)}, /* NAND_WEN */ 57 {OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)}, /* NAND_BE_CLE * [all...] |
/external/u-boot/board/compulab/cm_t43/ |
mux.c | 107 {OFFSET(spi0_d0), (MODE(0) | RXACTIVE | PULLUDEN)}, 108 {OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)}, 109 {OFFSET(spi0_cs0), (MODE(0) | RXACTIVE | PULLUDEN)}, 110 {OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)},
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/external/u-boot/arch/arm/include/asm/arch-am33xx/ |
mux_am43xx.h | 22 #define PULLUDEN (0x0 << 16) /* Pull up/down enable */
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mux_am33xx.h | 30 #define PULLUDEN (0x0 << 3) /* Pull up enabled */
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mux_ti814x.h | 22 #define PULLUDEN (0x0 << 16) /* Pull up enabled */
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mux_ti816x.h | 28 #define PULLUDEN (0x0 << 3) /* Pull up enabled */
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/external/u-boot/board/ti/ti816x/ |
evm.c | 65 { OFFSET(pincntl158), PULLDOWN_EN | PULLUDEN | MODE(0x0) },
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/external/u-boot/board/grinn/chiliboard/ |
board.c | 34 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
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