/external/pcre/dist2/src/sljit/ |
sljitNativeX86_64.c | 36 *inst++ = REX_W | ((reg_map[reg] <= 7) ? 0 : REX_B); 55 *code_ptr++ = short_addr ? REX_B : (REX_W | REX_B); 131 inst[0] = REX_W; 137 inst[0] = REX_W | REX_R; 143 inst[0] = REX_W | REX_R; 149 inst[0] = REX_W; 155 inst[0] = REX_W; 161 inst[0] = REX_W | REX_B; 274 *inst++ = REX_W; 283 *inst++ = REX_W; [all...] |
sljitNativeX86_common.c | 125 #define REX_W 0x48 816 *inst++ = REX_W; 839 *inst++ = REX_W | ((op >= SLJIT_DIVMOD_UW) ? REX_B : 0); 846 *inst++ = REX_W; [all...] |
/art/disassembler/ |
disassembler_x86.cc | 64 constexpr uint8_t REX_W = 8U /* 0b1000 */; 72 bool rex_w = (rex & REX_W) != 0; local 75 } else if (rex_w) { 161 std::string DisassemblerX86::DumpAddress(uint8_t mod, uint8_t rm, uint8_t rex64, uint8_t rex_w, 228 DumpRmReg(address, rex_w, rm, byte_operand || byte_second_operand, 400 if ((rex & REX_W) != 0) { 1488 uint8_t rex_w = (supports_rex_ && target_specific) ? (rex | 0x48) : rex; local [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/MCTargetDesc/ |
X86BaseInfo.h | 302 // REX_W - REX prefixes are instruction prefixes used in 64-bit mode. 308 REX_W = 1 << REXShift, 382 /// way as REX_W is for regular SSE instructions.
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X86MCCodeEmitter.cpp | 626 if (TSFlags & X86II::REX_W) [all...] |
/external/llvm/lib/Target/X86/MCTargetDesc/ |
X86BaseInfo.h | 391 // REX_W - REX prefixes are instruction prefixes used in 64-bit mode. 397 REX_W = 1 << REXShift, 481 /// way as REX_W is for regular SSE instructions.
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X86MCCodeEmitter.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/MCTargetDesc/ |
X86BaseInfo.h | 443 // REX_W - REX prefixes are instruction prefixes used in 64-bit mode. 449 REX_W = 1 << REXShift, 534 /// way as REX_W is for regular SSE instructions.
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X86MCCodeEmitter.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
X86CodeEmitter.cpp | 156 if (Desc.TSFlags & X86II::REX_W) [all...] |
/external/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
X86InstrInfo.cpp | 714 unsigned ShiftCountMask = (MI.getDesc().TSFlags & X86II::REX_W) ? 63 : 31; [all...] |