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    Searched refs:SGRF_BASE (Results 1 - 15 of 15) sorted by null

  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/secure/
secure.c 19 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16),
23 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16),
69 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(rgn),
73 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(rgn + 8),
76 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16),
87 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(3),
99 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(3),
133 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(5),
135 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(6),
137 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(7)
    [all...]
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/pmu/
m0_ctl.c 21 mmio_write_32(SGRF_BASE + SGRF_PMU_CON(0), WMSK_BIT(7));
22 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(6), WMSK_BIT(12));
25 mmio_write_32(SGRF_BASE + SGRF_PMU_CON(3),
28 mmio_write_32(SGRF_BASE + SGRF_PMU_CON(7),
pmu.c     [all...]
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/soc/
soc.c 24 MAP_REGION_FLAT(SGRF_BASE, SGRF_SIZE,
127 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(2), 0xf0000000);
128 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(3), SGRF_MST_S_ALL_NS);
129 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(4), SGRF_MST_S_ALL_NS);
132 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(3), DMA_IRQ_BOOT_NS);
133 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(4), DMA_PERI_CH_NS_15_0);
134 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(5), DMA_PERI_CH_NS_19_16);
135 mmio_write_32(SGRF_BASE + SGRF_DMAC_CON(5), DMA_MANAGER_BOOT_NS);
  /external/u-boot/arch/arm/mach-rockchip/
rk3368-board-tpl.c 29 const uintptr_t SGRF_BASE =
32 return SGRF_BASE + sizeof(u32) * no;
37 const uintptr_t SGRF_BASE =
40 const uintptr_t SGRF_BUSDMAC_BASE = SGRF_BASE + SGRF_BUSDMAC_OFFSET;
rk322x-board-spl.c 24 #define SGRF_BASE 0x10140000
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/soc/
soc.c 25 MAP_REGION_FLAT(SGRF_BASE, SGRF_SIZE,
70 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(5), SGRF_SOC_CON_NS);
71 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(6), SGRF_SOC_CON7_BITS);
72 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(7), SGRF_SOC_CON_NS);
75 mmio_write_32(SGRF_BASE + SGRF_BUSDMAC_CON(0), SGRF_BUSDMAC_CON0_NS);
76 mmio_write_32(SGRF_BASE + SGRF_BUSDMAC_CON(1), SGRF_BUSDMAC_CON1_NS);
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/drivers/pmu/
pmu.c 229 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1),
232 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(2),
311 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1 + cluster),
318 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1 + cluster),
332 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1),
335 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(2),
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3368/
rk3368_def.h 28 #define SGRF_BASE 0xff740000
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/
rk3328_def.h 24 #define SGRF_BASE 0xff0d0000
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/drivers/dram/
dram.c 22 sdram_config.stride = (mmio_read_32(SGRF_BASE + SGRF_SOC_CON3_7(4)) >>
suspend.c 114 mmio_write_32(SGRF_BASE + SGRF_DDRRGN_CON0_16(16),
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
addressmap_shared.h 28 #define SGRF_BASE (MMIO_BASE + 0x07330000)
dram_regs.h 97 #define DDR_STRIDE(n) mmio_write_32(SGRF_BASE + SGRF_SOC_CON3_7(4), \
  /device/linaro/bootloader/arm-trusted-firmware/plat/rockchip/rk3328/drivers/pmu/
pmu.c 597 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1),
654 mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1),

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