| /external/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 68 Opcode == Instruction::SRem || Opcode == Instruction::URem) &&
428 { ISD::SREM, MVT::v1i64, 1 * FunctionCallDivCost},
432 { ISD::SREM, MVT::v2i32, 2 * FunctionCallDivCost},
436 { ISD::SREM, MVT::v4i16, 4 * FunctionCallDivCost},
440 { ISD::SREM, MVT::v8i8, 8 * FunctionCallDivCost},
445 { ISD::SREM, MVT::v2i64, 2 * FunctionCallDivCost},
449 { ISD::SREM, MVT::v4i32, 4 * FunctionCallDivCost},
453 { ISD::SREM, MVT::v8i16, 8 * FunctionCallDivCost},
457 { ISD::SREM, MVT::v16i8, 16 * FunctionCallDivCost},
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 106 Opcode == Instruction::SRem || Opcode == Instruction::URem) &&
473 { ISD::SREM, MVT::v1i64, 1 * FunctionCallDivCost},
477 { ISD::SREM, MVT::v2i32, 2 * FunctionCallDivCost},
481 { ISD::SREM, MVT::v4i16, 4 * FunctionCallDivCost},
485 { ISD::SREM, MVT::v8i8, 8 * FunctionCallDivCost},
490 { ISD::SREM, MVT::v2i64, 2 * FunctionCallDivCost},
494 { ISD::SREM, MVT::v4i32, 4 * FunctionCallDivCost},
498 { ISD::SREM, MVT::v8i16, 8 * FunctionCallDivCost},
502 { ISD::SREM, MVT::v16i8, 16 * FunctionCallDivCost},
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| ISDOpcodes.h | 189 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 195 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 201 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM,
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 247 if ((ISD == ISD::SDIV || ISD == ISD::SREM || ISD == ISD::UDIV ||
252 if (ISD == ISD::SDIV || ISD == ISD::SREM) {
268 if (ISD == ISD::SREM) {
269 // For SREM: (X % C) is the equivalent of (X - (X/C)*C)
295 { ISD::SREM, MVT::v32i16, 8 }, // vpmulhw+mul+sub sequence
313 { ISD::SREM, MVT::v16i32, 17 }, // vpmuldq+mul+sub sequence
333 { ISD::SREM, MVT::v16i16, 8 }, // vpmulhw+mul+sub sequence
337 { ISD::SREM, MVT::v8i32, 19 }, // vpmuldq+mul+sub sequence
359 { ISD::SREM, MVT::v16i16, 16+2 }, // 2*pmulhw+mul+sub sequence + split.
361 { ISD::SREM, MVT::v8i16, 8 }, // pmulhw+mul+sub sequenc
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 144 case ISD::SREM:
|
| SelectionDAGBuilder.h | 485 void visitSRem(const User &I) { visitBinary(I, ISD::SREM); }
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| BlackfinISelLowering.cpp | 83 setOperationAction(ISD::SREM, MVT::i16, Expand);
84 setOperationAction(ISD::SREM, MVT::i32, Expand);
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 102 setOperationAction(ISD::SREM, MVT::i32, Expand);
104 setOperationAction(ISD::SREM, MVT::i64, Expand);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 97 setOperationAction(ISD::SREM , MVT::i64, Custom);
679 case ISD::SREM:
700 case ISD::SREM: opstr = "__remq"; break;
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| MipsFastISel.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 180 setOperationAction(ISD::SREM, MVT::i8, Expand);
186 setOperationAction(ISD::SREM, MVT::i16, Expand);
192 setOperationAction(ISD::SREM, MVT::i32, Expand);
198 setOperationAction(ISD::SREM, MVT::i64, Expand);
204 setOperationAction(ISD::SREM, MVT::i128, Expand);
423 setOperationAction(ISD::SREM, VT, Expand);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 151 setOperationAction(ISD::SREM, MVT::i8, Expand);
157 setOperationAction(ISD::SREM, MVT::i16, Expand);
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 158 setOperationAction(ISD::SREM, MVT::i8, Expand);
164 setOperationAction(ISD::SREM, MVT::i16, Expand);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | 711 case ISD::SREM:
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.h | [all...] |
| SelectionDAGDumper.cpp | 182 case ISD::SREM: return "srem";
|
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 82 setOperationAction(ISD::SREM, MVT::i64, Expand);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.h | [all...] |
| SelectionDAGDumper.cpp | 215 case ISD::SREM: return "srem";
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| BPFISelLowering.cpp | 89 setOperationAction(ISD::SREM, VT, Expand);
|
| /external/llvm/lib/CodeGen/ |
| TargetLoweringBase.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
| AVRISelLowering.cpp | 149 setOperationAction(ISD::SREM, MVT::i8, Expand);
150 setOperationAction(ISD::SREM, MVT::i16, Expand);
[all...] |
