/external/llvm/lib/CodeGen/SelectionDAG/ |
InstrEmitter.cpp | 754 const MCPhysReg *ScratchRegs = nullptr; 766 ScratchRegs = TLI->getScratchRegisters((CallingConv::ID) CC); 804 if (ScratchRegs) 805 for (unsigned i = 0; ScratchRegs[i]; ++i) 806 MIB.addReg(ScratchRegs[i], RegState::ImplicitDefine | [all...] |
FastISel.cpp | 642 const MCPhysReg *ScratchRegs = TLI.getScratchRegisters(CC); 643 for (unsigned i = 0; ScratchRegs[i]; ++i) 645 ScratchRegs[i], /*IsDef=*/true, /*IsImp=*/true, /*IsKill=*/false, 824 const MCPhysReg *ScratchRegs = TLI.getScratchRegisters(CC); 825 for (unsigned i = 0; ScratchRegs[i]; ++i) 827 ScratchRegs[i], /*IsDef=*/true, /*IsImp=*/true, /*IsKill=*/false, [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
InstrEmitter.cpp | 809 const MCPhysReg *ScratchRegs = nullptr; [all...] |
FastISel.cpp | 820 const MCPhysReg *ScratchRegs = TLI.getScratchRegisters(CC); 821 for (unsigned i = 0; ScratchRegs[i]; ++i) 823 ScratchRegs[i], /*IsDef=*/true, /*IsImp=*/true, /*IsKill=*/false, [all...] |
/external/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
ARMBaseInstrInfo.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |