/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
InfoByHwMode.cpp | 121 SpillAlignment = R->getValueAsInt("SpillAlignment"); 125 return std::tie(RegSize, SpillSize, SpillAlignment) < 126 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment); 131 SpillAlignment && I.SpillAlignment % SpillAlignment == 0 && 137 << ",A=" << SpillAlignment << ']'; 170 return std::tie(A0.SpillSize, A0.SpillAlignment) > 171 std::tie(B0.SpillSize, B0.SpillAlignment); [all...] |
InfoByHwMode.h | 144 unsigned SpillAlignment; 150 return std::tie(RegSize, SpillSize, SpillAlignment) == 151 std::tie(I.RegSize, I.SpillSize, I.SpillAlignment);
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RegisterInfoEmitter.cpp | [all...] |
CodeGenRegisters.cpp | 791 RI.SpillAlignment = R->getValueAsInt("Alignment"); [all...] |
/external/swiftshader/third_party/LLVM/utils/TableGen/ |
CodeGenRegisters.h | 112 unsigned SpillAlignment; 194 unsigned SpillAlignment; 199 SpillAlignment(O.SpillAlignment) {} 202 : Members(M), SpillSize(S), SpillAlignment(A) {} 207 SpillAlignment(RC.SpillAlignment) {} 209 // Lexicographical order of (Members, SpillSize, SpillAlignment).
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CodeGenRegisters.cpp | 330 SpillAlignment = R->getValueAsInt("Alignment"); 345 SpillAlignment(Props.SpillAlignment), 381 OS << "{ S=" << K.SpillSize << ", A=" << K.SpillAlignment; 398 return SpillAlignment < B.SpillAlignment; 412 return A->SpillAlignment && B->SpillAlignment % A->SpillAlignment == 0 && 445 if (A->SpillAlignment < B->SpillAlignment [all...] |
RegisterInfoEmitter.cpp | 377 << RC.SpillAlignment/8 << ", "
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/external/llvm/utils/TableGen/ |
CodeGenRegisters.h | 304 unsigned SpillAlignment; 408 unsigned SpillAlignment; 411 : Members(M), SpillSize(S), SpillAlignment(A) {} 416 SpillAlignment(RC.SpillAlignment) {} 418 // Lexicographical order of (Members, SpillSize, SpillAlignment).
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CodeGenRegisters.cpp | 709 SpillAlignment = R->getValueAsInt("Alignment"); 730 SpillAlignment(Props.SpillAlignment), 771 OS << "{ S=" << K.SpillSize << ", A=" << K.SpillAlignment; 783 return std::tie(*Members, SpillSize, SpillAlignment) < 784 std::tie(*B.Members, B.SpillSize, B.SpillAlignment); 798 return A->SpillAlignment && B->SpillAlignment % A->SpillAlignment == 0 && 825 if (A->SpillAlignment < B->SpillAlignment [all...] |
RegisterInfoEmitter.cpp | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
TargetRegisterInfo.h | 225 unsigned RegSize, SpillSize, SpillAlignment; 327 return getRegClassInfo(RC).SpillAlignment / 8; [all...] |