| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Transforms/Utils/ |
| LowerMemIntrinsics.h | 32 unsigned SrcAlign, unsigned DestAlign,
40 unsigned SrcAlign, unsigned DestAlign,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/ |
| IRBuilder.cpp | 158 CreateMemCpy(Value *Dst, unsigned DstAlign, Value *Src, unsigned SrcAlign,
162 assert((SrcAlign == 0 || isPowerOf2_32(SrcAlign)) && "Must be 0 or a power of 2");
176 if (SrcAlign > 0)
177 MCI->setSourceAlignment(SrcAlign);
197 Value *Dst, unsigned DstAlign, Value *Src, unsigned SrcAlign, Value *Size,
202 assert(SrcAlign >= ElementSize &&
218 AMCI->setSourceAlignment(SrcAlign);
238 CreateMemMove(Value *Dst, unsigned DstAlign, Value *Src, unsigned SrcAlign,
242 assert((SrcAlign == 0 || isPowerOf2_32(SrcAlign)) && "Must be 0 or a power of 2")
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
| LowerMemIntrinsics.cpp | 28 unsigned SrcAlign, unsigned DestAlign,
42 TTI.getMemcpyLoopLoweringType(Ctx, CopyLen, SrcAlign, DestAlign);
98 SrcAlign = std::min(SrcAlign, LoopOpSize);
103 SrcAlign, DestAlign);
138 Value *CopyLen, unsigned SrcAlign,
150 TTI.getMemcpyLoopLoweringType(Ctx, CopyLen, SrcAlign, DestAlign);
290 unsigned SrcAlign, unsigned DestAlign,
412 /* SrcAlign */ Memcpy->getSourceAlignment(),
422 /* SrcAlign */ Memcpy->getSourceAlignment()
[all...] |
| /external/llvm/lib/Target/BPF/ |
| BPFISelLowering.h | 80 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| BPFISelLowering.h | 101 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/ |
| TargetTransformInfo.h | [all...] |
| TargetTransformInfoImpl.h | 502 unsigned SrcAlign, unsigned DestAlign) const {
509 unsigned SrcAlign,
|
| /external/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.h | 94 unsigned SrcAlign, bool IsMemset,
|
| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| InstCombineCalls.cpp | 35 unsigned SrcAlign = getKnownAlignment(MI->getArgOperand(1), TD);
36 unsigned MinAlign = std::min(DstAlign, SrcAlign);
108 SrcAlign = std::max(SrcAlign, CopyAlign);
114 L->setAlignment(SrcAlign);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
| TargetTransformInfo.cpp | 554 unsigned SrcAlign,
556 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAlign,
562 unsigned RemainingBytes, unsigned SrcAlign, unsigned DestAlign) const {
564 SrcAlign, DestAlign);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
| IRBuilder.h | 447 unsigned SrcAlign, uint64_t Size,
452 return CreateMemCpy(Dst, DstAlign, Src, SrcAlign, getInt64(Size),
458 unsigned SrcAlign, Value *Size,
467 /// DstAlign/SrcAlign are the alignments of the Dst/Src pointers, respectively.
473 Value *Dst, unsigned DstAlign, Value *Src, unsigned SrcAlign,
478 Dst, DstAlign, Src, SrcAlign, getInt64(Size), ElementSize, TBAATag,
483 Value *Dst, unsigned DstAlign, Value *Src, unsigned SrcAlign, Value *Size,
494 CallInst *CreateMemMove(Value *Dst, unsigned DstAlign, Value *Src, unsigned SrcAlign,
498 return CreateMemMove(Dst, DstAlign, Src, SrcAlign, getInt64(Size), isVolatile,
502 CallInst *CreateMemMove(Value *Dst, unsigned DstAlign, Value *Src, unsigned SrcAlign,
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| PPCISelLowering.h | 353 /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it
363 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| SROA.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.h | 314 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 277 unsigned DstAlign, unsigned SrcAlign,
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 557 unsigned SrcAlign,
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.h | 536 /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it
546 getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign,
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| SIISelLowering.h | 207 unsigned SrcAlign, bool IsMemset,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| HexagonISelLowering.h | 291 unsigned SrcAlign, bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 666 unsigned SrcAlign,
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| SelectionDAG.cpp | [all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineCalls.cpp | 83 unsigned SrcAlign = getKnownAlignment(MI->getArgOperand(1), DL, MI, AC, DT);
84 unsigned MinAlign = std::min(DstAlign, SrcAlign);
156 SrcAlign = std::max(SrcAlign, CopyAlign);
162 L->setAlignment(SrcAlign);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | [all...] |
