1 //===-- BPFISelLowering.h - BPF DAG Lowering Interface ----------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines the interfaces that BPF uses to lower LLVM code into a 11 // selection DAG. 12 // 13 //===----------------------------------------------------------------------===// 14 15 #ifndef LLVM_LIB_TARGET_BPF_BPFISELLOWERING_H 16 #define LLVM_LIB_TARGET_BPF_BPFISELLOWERING_H 17 18 #include "BPF.h" 19 #include "llvm/CodeGen/SelectionDAG.h" 20 #include "llvm/CodeGen/TargetLowering.h" 21 22 namespace llvm { 23 class BPFSubtarget; 24 namespace BPFISD { 25 enum NodeType : unsigned { 26 FIRST_NUMBER = ISD::BUILTIN_OP_END, 27 RET_FLAG, 28 CALL, 29 SELECT_CC, 30 BR_CC, 31 Wrapper, 32 MEMCPY 33 }; 34 } 35 36 class BPFTargetLowering : public TargetLowering { 37 public: 38 explicit BPFTargetLowering(const TargetMachine &TM, const BPFSubtarget &STI); 39 40 // Provide custom lowering hooks for some operations. 41 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 42 43 // This method returns the name of a target specific DAG node. 44 const char *getTargetNodeName(unsigned Opcode) const override; 45 46 // This method decides whether folding a constant offset 47 // with the given GlobalAddress is legal. 48 bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override; 49 50 std::pair<unsigned, const TargetRegisterClass *> 51 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI, 52 StringRef Constraint, MVT VT) const override; 53 54 MachineBasicBlock * 55 EmitInstrWithCustomInserter(MachineInstr &MI, 56 MachineBasicBlock *BB) const override; 57 58 bool getHasAlu32() const { return HasAlu32; } 59 bool getHasJmpExt() const { return HasJmpExt; } 60 61 EVT getSetCCResultType(const DataLayout &DL, LLVMContext &Context, 62 EVT VT) const override; 63 64 MVT getScalarShiftAmountTy(const DataLayout &, EVT) const override; 65 66 private: 67 // Control Instruction Selection Features 68 bool HasAlu32; 69 bool HasJmpExt; 70 71 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 72 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 73 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const; 74 75 // Lower the result values of a call, copying them out of physregs into vregs 76 SDValue LowerCallResult(SDValue Chain, SDValue InFlag, 77 CallingConv::ID CallConv, bool IsVarArg, 78 const SmallVectorImpl<ISD::InputArg> &Ins, 79 const SDLoc &DL, SelectionDAG &DAG, 80 SmallVectorImpl<SDValue> &InVals) const; 81 82 // Maximum number of arguments to a call 83 static const unsigned MaxArgs; 84 85 // Lower a call into CALLSEQ_START - BPFISD:CALL - CALLSEQ_END chain 86 SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI, 87 SmallVectorImpl<SDValue> &InVals) const override; 88 89 // Lower incoming arguments, copy physregs into vregs 90 SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, 91 bool IsVarArg, 92 const SmallVectorImpl<ISD::InputArg> &Ins, 93 const SDLoc &DL, SelectionDAG &DAG, 94 SmallVectorImpl<SDValue> &InVals) const override; 95 96 SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, 97 const SmallVectorImpl<ISD::OutputArg> &Outs, 98 const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL, 99 SelectionDAG &DAG) const override; 100 101 EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign, unsigned SrcAlign, 102 bool IsMemset, bool ZeroMemset, bool MemcpyStrSrc, 103 MachineFunction &MF) const override { 104 return Size >= 8 ? MVT::i64 : MVT::i32; 105 } 106 107 bool shouldConvertConstantLoadToIntImm(const APInt &Imm, 108 Type *Ty) const override { 109 return true; 110 } 111 112 unsigned EmitSubregExt(MachineInstr &MI, MachineBasicBlock *BB, unsigned Reg, 113 bool isSigned) const; 114 115 MachineBasicBlock * EmitInstrWithCustomInserterMemcpy(MachineInstr &MI, 116 MachineBasicBlock *BB) 117 const; 118 119 }; 120 } 121 122 #endif 123
