| /external/llvm/lib/Target/Hexagon/ |
| RDFCopy.cpp | 36 RegisterRef SrcR = { Src.getReg(), Src.getSubReg() };
38 if (!TargetRegisterInfo::isVirtualRegister(SrcR.Reg))
41 if (MRI.getRegClass(DstR.Reg) != MRI.getRegClass(SrcR.Reg))
44 if (!TargetRegisterInfo::isPhysicalRegister(SrcR.Reg))
48 TRI.getMinimalPhysRegClass(SrcR.Reg))
54 EM.insert(std::make_pair(DstR, SrcR));
|
| HexagonGenInsert.cpp | 429 // ... = insert(SrcR, InsR, #Wdh, #Off)
432 : SrcR(SR), InsR(IR), Wdh(W), Off(O) {}
433 unsigned SrcR, InsR;
447 unsigned SrcR = P.IFR.SrcR, InsR = P.IFR.InsR;
448 OS << '(' << PrintReg(SrcR, P.TRI) << ',' << PrintReg(InsR, P.TRI)
488 bool isValidInsertForm(unsigned DstR, unsigned SrcR, unsigned InsR,
637 bool HexagonGenInsert::isValidInsertForm(unsigned DstR, unsigned SrcR,
640 const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcR);
839 unsigned SrcR = *I
[all...] |
| HexagonRDFOpt.cpp | 98 auto mapRegs = [MI,&EM] (RegisterRef DstR, RegisterRef SrcR) -> void {
99 EM.insert(std::make_pair(DstR, SrcR));
|
| HexagonFrameLowering.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| RDFCopy.cpp | 48 RegisterRef SrcR = DFG.makeRegRef(Src.getReg(), Src.getSubReg());
50 assert(TargetRegisterInfo::isPhysicalRegister(SrcR.Reg));
53 TRI.getMinimalPhysRegClass(SrcR.Reg))
55 EM.insert(std::make_pair(DstR, SrcR));
|
| HexagonGenInsert.cpp | 462 // ... = insert(SrcR, InsR, #Wdh, #Off)
465 : SrcR(SR), InsR(IR), Wdh(W), Off(O) {}
467 unsigned SrcR, InsR;
483 unsigned SrcR = P.IFR.SrcR, InsR = P.IFR.InsR;
484 OS << '(' << printReg(SrcR, P.TRI) << ',' << printReg(InsR, P.TRI)
530 bool isValidInsertForm(unsigned DstR, unsigned SrcR, unsigned InsR,
680 bool HexagonGenInsert::isValidInsertForm(unsigned DstR, unsigned SrcR,
683 const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcR);
877 unsigned SrcR = *I
[all...] |
| HexagonRDFOpt.cpp | 113 auto mapRegs = [&EM] (RegisterRef DstR, RegisterRef SrcR) -> void {
114 EM.insert(std::make_pair(DstR, SrcR));
|
| HexagonFrameLowering.cpp | [all...] |
| HexagonBitSimplify.cpp | [all...] |
| HexagonConstPropagation.cpp | [all...] |
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 388 const MachineOperand &SrcR = MI.getOperand(SrcR1 == DstR ? 1 : 3);
391 .addOperand(SrcR)
|
| /external/swiftshader/third_party/subzero/src/ |
| IceTargetLoweringMIPS32.cpp | [all...] |
| IceTargetLoweringARM32.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 448 const MachineOperand &SrcR = MI.getOperand(SrcR1 == DstR ? 1 : 3);
450 .add(SrcR)
|
