| /external/llvm/lib/CodeGen/ |
| AggressiveAntiDepBreaker.cpp | 556 unsigned SuperReg = 0;
559 if ((SuperReg == 0) || TRI->isSuperRegister(SuperReg, Reg))
560 SuperReg = Reg;
579 // All group registers should be a subreg of SuperReg.
582 if (Reg == SuperReg) continue;
583 bool IsSub = TRI->isSubRegister(SuperReg, Reg);
598 dbgs() << "*** Performing rename " << TRI->getName(SuperReg) <<
603 // Check each possible rename register for SuperReg in round-robin
612 TRI->getMinimalPhysRegClass(SuperReg, MVT::Other)
[all...] |
| ScheduleDAGInstrs.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| AggressiveAntiDepBreaker.cpp | 570 unsigned SuperReg = 0;
573 if ((SuperReg == 0) || TRI->isSuperRegister(SuperReg, Reg))
574 SuperReg = Reg;
590 // All group registers should be a subreg of SuperReg.
593 if (Reg == SuperReg) continue;
594 bool IsSub = TRI->isSubRegister(SuperReg, Reg);
607 dbgs() << "*** Performing rename " << TRI->getName(SuperReg) <<
612 // Check each possible rename register for SuperReg in round-robin
621 TRI->getMinimalPhysRegClass(SuperReg, MVT::Other)
[all...] |
| CriticalAntiDepBreaker.cpp | 284 unsigned SuperReg = *Super;
285 Classes[SuperReg] = reinterpret_cast<TargetRegisterClass *>(-1);
|
| PostRASchedulerList.cpp | 416 const unsigned SuperReg = MO.getReg();
417 for (const unsigned *Subreg = TRI->getSubRegisters(SuperReg);
|
| LiveIntervalAnalysis.cpp | [all...] |
| VirtRegRewriter.cpp | 486 "invalid superreg kill flags");
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| AggressiveAntiDepBreaker.cpp | 575 unsigned SuperReg = 0;
578 if ((SuperReg == 0) || TRI->isSuperRegister(SuperReg, Reg))
579 SuperReg = Reg;
598 // All group registers should be a subreg of SuperReg.
601 if (Reg == SuperReg) continue;
602 bool IsSub = TRI->isSubRegister(SuperReg, Reg);
617 dbgs() << "*** Performing rename " << printReg(SuperReg, TRI)
622 // Check each possible rename register for SuperReg in round-robin
631 TRI->getMinimalPhysRegClass(SuperReg, MVT::Other)
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| SIRegisterInfo.cpp | 658 unsigned SuperReg = MI->getOperand(0).getReg();
668 assert(SpillToVGPR || (SuperReg != MFI->getStackPtrOffsetReg() &&
669 SuperReg != MFI->getFrameOffsetReg() &&
670 SuperReg != MFI->getScratchWaveOffsetReg()));
672 assert(SuperReg != AMDGPU::M0 && "m0 should never spill");
687 const TargetRegisterClass *RC = getPhysRegClass(SuperReg);
698 // SubReg carries the "Kill" flag when SubReg == SuperReg.
702 SuperReg : getSubReg(SuperReg, SplitParts[i]);
784 // The last implicit use of the SuperReg carries the "Kill" flag
[all...] |
| SIInstrInfo.h | 69 MachineOperand &SuperReg,
75 MachineOperand &SuperReg,
[all...] |
| SIInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 849 unsigned SuperReg =
852 if (VSXSelfCopyCrash && SrcReg == SuperReg)
855 DestReg = SuperReg;
858 unsigned SuperReg =
861 if (VSXSelfCopyCrash && SrcReg == SuperReg)
864 DestReg = SuperReg;
867 unsigned SuperReg =
870 if (VSXSelfCopyCrash && DestReg == SuperReg)
873 SrcReg = SuperReg;
876 unsigned SuperReg
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| SIInstrInfo.h | 46 MachineOperand &SuperReg,
52 MachineOperand &SuperReg,
|
| SIRegisterInfo.cpp | 520 unsigned SuperReg = MI->getOperand(0).getReg();
522 // SubReg carries the "Kill" flag when SubReg == SuperReg.
525 unsigned SubReg = getPhysRegSubReg(SuperReg,
552 // The last implicit use of the SuperReg carries the "Kill" flag.
556 Mov.addReg(SuperReg, RegState::Implicit | SuperKillState);
[all...] |
| SIInstrInfo.cpp | [all...] |
| R600InstrInfo.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| AArch64ISelDAGToDAG.cpp | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/AsmParser/ |
| ARMAsmParser.cpp | [all...] |
