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      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro (at) socionext.com>
      4  */
      5 
      6 #include <common.h>
      7 #include <clk-uclass.h>
      8 #include <dm.h>
      9 
     10 struct clk_fixed_rate {
     11 	unsigned long fixed_rate;
     12 };
     13 
     14 #define to_clk_fixed_rate(dev)	((struct clk_fixed_rate *)dev_get_platdata(dev))
     15 
     16 static ulong clk_fixed_rate_get_rate(struct clk *clk)
     17 {
     18 	if (clk->id != 0)
     19 		return -EINVAL;
     20 
     21 	return to_clk_fixed_rate(clk->dev)->fixed_rate;
     22 }
     23 
     24 const struct clk_ops clk_fixed_rate_ops = {
     25 	.get_rate = clk_fixed_rate_get_rate,
     26 };
     27 
     28 static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev)
     29 {
     30 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
     31 	to_clk_fixed_rate(dev)->fixed_rate =
     32 		dev_read_u32_default(dev, "clock-frequency", 0);
     33 #endif
     34 
     35 	return 0;
     36 }
     37 
     38 static const struct udevice_id clk_fixed_rate_match[] = {
     39 	{
     40 		.compatible = "fixed-clock",
     41 	},
     42 	{ /* sentinel */ }
     43 };
     44 
     45 U_BOOT_DRIVER(clk_fixed_rate) = {
     46 	.name = "fixed_rate_clock",
     47 	.id = UCLASS_CLK,
     48 	.of_match = clk_fixed_rate_match,
     49 	.ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata,
     50 	.platdata_auto_alloc_size = sizeof(struct clk_fixed_rate),
     51 	.ops = &clk_fixed_rate_ops,
     52 };
     53