| /external/u-boot/board/freescale/p1_twr/ |
| ddr.c | 48 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
|
| /external/u-boot/board/freescale/bsc9132qds/ |
| ddr.c | 39 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
66 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
|
| /external/u-boot/board/freescale/ls1043ardb/ |
| ddr.h | 97 .ddr_sr_cntr = 0,
|
| /external/u-boot/board/Arcturus/ucp1020/ |
| ddr.c | 108 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
|
| /external/u-boot/board/freescale/p1010rdb/ |
| ddr.c | 42 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
69 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
|
| /external/u-boot/drivers/ddr/fsl/ |
| arm_ddr_gen3.c | 123 ddr_out32(&ddr->ddr_sr_cntr, regs->ddr_sr_cntr);
|
| fsl_ddr_gen4.c | 208 ddr_out32(&ddr->ddr_sr_cntr, regs->ddr_sr_cntr);
|
| mpc85xx_ddr_gen3.c | 146 out_be32(&ddr->ddr_sr_cntr, regs->ddr_sr_cntr);
|
| interactive.c | 670 CFG_REGS(ddr_sr_cntr),
761 CFG_REGS(ddr_sr_cntr),
[all...] |
| ctrl_regs.c | [all...] |
| /external/u-boot/board/freescale/bsc9131rdb/ |
| ddr.c | 40 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
|
| /external/u-boot/board/freescale/p1_p2_rdb_pc/ |
| ddr.c | 240 .ddr_sr_cntr = CONFIG_SYS_DDR_SR_CNTR,
|
| /external/u-boot/include/ |
| fsl_immap.h | 57 u32 ddr_sr_cntr; /* self refresh counter */ member in struct:ccsr_ddr
|
| fsl_ddr_sdram.h | 287 unsigned int ddr_sr_cntr; member in struct:fsl_ddr_cfg_regs_s
|
