HomeSort by relevance Sort by last modified time
    Searched refs:devdisr (Results 1 - 22 of 22) sorted by null

  /external/u-boot/drivers/net/fm/
p1023.c 20 u32 devdisr = in_be32(&gur->devdisr); local
22 return port_to_devdisr[port] & devdisr;
33 setbits_be32(&gur->devdisr, port_to_devdisr[port]);
40 clrbits_be32(&gur->devdisr, port_to_devdisr[port]);
  /external/u-boot/arch/powerpc/cpu/mpc86xx/
mp.c 39 setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU0);
42 setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU1);
55 u32 devdisr = in_be32(&gur->devdisr); local
59 return (devdisr & MPC86xx_DEVDISR_CPU0);
61 return (devdisr & MPC86xx_DEVDISR_CPU1);
  /external/u-boot/arch/powerpc/cpu/mpc85xx/
mp.c 104 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU0);
107 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU1);
119 u32 devdisr = in_be32(&gur->devdisr); local
123 return (devdisr & MPC85xx_DEVDISR_CPU0);
125 return (devdisr & MPC85xx_DEVDISR_CPU1);
336 u32 devdisr; local
343 devdisr = in_be32(&gur->devdisr);
345 devdisr |= MPC85xx_DEVDISR_TB0
    [all...]
fsl_corenet_serdes.c 343 u32 devdisr, u32 devdisr2, int cfg)
350 * logic blocks to be disabled in DEVDISR. We reverse that here.
352 * Note that normally it is not permitted to clear DEVDISR bits
356 clrbits_be32(&gur->devdisr, devdisr);
cpu.c 433 setbits_be32(&gur->devdisr, 0x00010000);
436 clrbits_be32(&gur->devdisr, 0x00010000);
  /external/u-boot/board/xes/common/
fsl_8xxx_pci.c 29 u32 devdisr = in_be32(&gur->devdisr); local
36 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
60 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
  /external/u-boot/board/freescale/mpc8544ds/
mpc8544ds.c 67 u32 devdisr, pordevsr, io_sel; local
73 devdisr = in_be32(&gur->devdisr);
78 debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
85 if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE3)){
117 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE3); /* disable */
122 first_free_busno = fsl_pcie_init_ctrl(first_free_busno, devdisr, PCIE1, &pci_info);
124 setbits_be32(&gur->devdisr, _DEVDISR_PCIE1); /* disable */
129 first_free_busno = fsl_pcie_init_ctrl(first_free_busno, devdisr, PCIE2, &pci_info)
    [all...]
  /external/u-boot/drivers/misc/
fsl_devdis.c 24 setbits_be32(&gur->devdisr + tbl[i].offset,
  /external/u-boot/board/freescale/mpc8548cds/
mpc8548cds.c 196 u32 devdisr, pordevsr, io_sel; local
201 devdisr = in_be32(&gur->devdisr);
206 debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
214 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
251 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */
266 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable */
  /external/u-boot/arch/powerpc/cpu/mpc8xxx/
srio.c 232 u32 *devdisr; local
235 devdisr = &gur->devdisr3;
237 devdisr = &gur->devdisr;
275 setbits_be32(devdisr, _DEVDISR_SRIO1);
277 setbits_be32(devdisr, _DEVDISR_SRIO2);
282 setbits_be32(devdisr, _DEVDISR_SRIO1);
283 setbits_be32(devdisr, _DEVDISR_SRIO2);
284 setbits_be32(devdisr, _DEVDISR_RMU);
  /external/u-boot/board/freescale/mpc8568mds/
mpc8568mds.c 296 u32 devdisr, pordevsr, io_sel; local
299 devdisr = in_be32(&gur->devdisr);
304 debug (" pci_init_board: devdisr=%x, io_sel=%x\n", devdisr, io_sel);
311 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
339 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */
  /external/u-boot/board/freescale/mpc8536ds/
mpc8536ds.c 149 u32 devdisr, pordevsr; local
156 devdisr = in_be32(&gur->devdisr);
165 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
190 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */
  /external/u-boot/board/freescale/mpc8610hpcd/
mpc8610hpcd.c 224 u32 devdisr; local
228 devdisr = in_be32(&gur->devdisr);
233 if (!(devdisr & MPC86xx_DEVDISR_PCI1)) {
256 setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_PCI1); /* disable */
  /external/u-boot/board/sbc8548/
sbc8548.c 248 u32 devdisr = in_be32(&gur->devdisr); local
252 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
279 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); /* disable */
282 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI2); /* disable PCI2 */
  /external/u-boot/drivers/pci/
fsl_pci_init.c 810 int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev,
820 if (is_serdes_configured(dev) && !(devdisr & devdisr_mask[num])) {
834 u32 devdisr; local
840 addr = &gur->devdisr;
842 devdisr = in_be32(addr);
846 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE1, &pci_info);
853 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE2, &pci_info);
860 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE3, &pci_info);
867 busno = fsl_pcie_init_ctrl(busno, devdisr, PCIE4, &pci_info);
875 int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev
    [all...]
  /external/u-boot/drivers/qe/
qe.c 408 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE);
547 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE);
655 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_QE_DISABLE);
  /external/u-boot/arch/powerpc/include/asm/
fsl_pci.h 190 int fsl_pcie_init_ctrl(int busno, u32 devdisr, enum srds_prtcl dev,
immap_86xx.h 1091 uint devdisr; \/* 0xe0070 - Device disable control *\/ member in struct:ccsr_gur
    [all...]
immap_85xx.h 1604 u32 devdisr; \/* Device disable control *\/ member in struct:ccsr_gur
2449 u32 devdisr; \/* Device disable control *\/ member in struct:ccsr_gur
    [all...]
  /external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
immap_lsch3.h 214 u32 devdisr; /* Device disable control 1 */ member in struct:ccsr_gur
immap_lsch2.h 223 u32 devdisr; /* Device disable control */ member in struct:ccsr_gur
  /external/u-boot/arch/arm/include/asm/arch-ls102xa/
immap_ls102xa.h 98 u32 devdisr; /* Device disable control */ member in struct:ccsr_gur

Completed in 808 milliseconds