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    Searched refs:div_cpu0 (Results 1 - 6 of 6) sorted by null

/external/u-boot/arch/arm/mach-exynos/
clock_init_exynos4.c	62 writel(CLK_DIV_CPU0_VAL, &clk->div_cpu0);
clock.c	578 div = readl(&clk->div_cpu0); 600 div = readl(&clk->div_cpu0); 622 div = readl(&clk->div_cpu0);     [all...]
clock_init_exynos5.c	607 writel(val, &clk->div_cpu0); 813 writel(CLK_DIV_CPU0_VAL, &clk->div_cpu0);
/external/u-boot/board/samsung/trats/
trats.c	76 writel(0x00000100, &clk->div_cpu0); 322 writel(CLK_DIV_CPU0_VAL, (unsigned int)&clk->div_cpu0);
/external/u-boot/arch/arm/mach-exynos/include/mach/
clock.h	195 unsigned int div_cpu0; member in struct:exynos4_clock 445 unsigned int div_cpu0; member in struct:exynos4x12_clock 525 unsigned int div_cpu0; member in struct:exynos5_clock 870 unsigned int div_cpu0; /* 0x10010500 */ member in struct:exynos5420_clock     [all...]
/external/u-boot/board/samsung/odroid/
odroid.c	155 clrsetbits_le32(&clk->div_cpu0, clr, set);

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