| /external/clang/test/CXX/temp/temp.arg/temp.arg.nontype/ |
| p1-11.cpp | 21 IP<0> ip0; // expected-error{{null non-type template argument must be cast to template parameter type 'int *'}} variable
|
| /external/clang/test/FixIt/ |
| fixit-cxx0x.cpp | 107 IP<0> ip0; // expected-error{{null non-type template argument must be cast to template parameter type 'int *'}} variable
|
| /external/vixl/examples/aarch64/ |
| custom-disassembler.cc | 41 AppendToOutput(reg.Is64Bits() ? "ip0" : "wip0");
122 __ Add(x11, ip0, ip1);
|
| /art/compiler/optimizing/ |
| code_generator_arm64.cc | [all...] |
| code_generator_arm64.h | 84 const vixl::aarch64::CPURegList vixl_reserved_core_registers(vixl::aarch64::ip0,
[all...] |
| intrinsics_arm64.cc | 198 // IP0 is used internally by the ReadBarrierMarkRegX entry point
201 DCHECK_NE(LocationFrom(src_curr_addr).reg(), IP0);
202 DCHECK_NE(LocationFrom(dst_curr_addr).reg(), IP0);
203 DCHECK_NE(LocationFrom(src_stop_addr).reg(), IP0);
204 DCHECK_NE(tmp_.reg(), IP0);
[all...] |
| /external/v8/src/arm64/ |
| deoptimizer-arm64.cc | 112 saved_registers.Remove(ip0);
|
| macro-assembler-arm64.h | 63 constexpr Register kOffHeapTrampolineRegister = ip0;
[all...] |
| assembler-arm64.h | 440 ALIAS_REGISTER(Register, ip0, x16);
[all...] |
| macro-assembler-arm64.cc | 46 CPURegList TurboAssembler::DefaultTmpList() { return CPURegList(ip0, ip1); }
[all...] |
| /external/vixl/src/aarch64/ |
| operands-aarch64.h | 475 const XRegister ip0 = x16;
[all...] |
| macro-assembler-aarch64.cc | 323 tmp_list_(ip0, ip1),
344 tmp_list_(ip0, ip1),
363 tmp_list_(ip0, ip1),
[all...] |
| /art/compiler/utils/arm64/ |
| managed_register_arm64_test.cc | 92 EXPECT_EQ(IP0, reg.AsXRegister());
628 EXPECT_TRUE(vixl::aarch64::ip0.Is(Arm64Assembler::reg_x(IP0)));
[all...] |
| /external/vixl/test/aarch64/ |
| test-assembler-aarch64.cc | [all...] |
