| /external/u-boot/arch/arm/mach-mvebu/serdes/a38x/ |
| high_speed_env_spec-38x.c | 81 int hws_is_serdes_active(u8 lane_num)
86 if (lane_num > 6)
90 if (sys_env_device_id_get() == MV_6810 && lane_num == 4) {
100 if (sys_env_device_id_get() == MV_6810 && lane_num == 5)
103 if (lane_num >= hws_serdes_get_max_lane())
|
| high_speed_env_spec.h | 248 int hws_is_serdes_active(u8 lane_num);
|
| high_speed_env_spec.c | 1365 u32 lane_num; local
[all...] |
| /device/google/bonito/sdm710/kernel-headers/media/ |
| cam_isp.h | 105 uint32_t lane_num; member in struct:cam_isp_in_port_info
|
| /device/google/bonito/sdm710/original-kernel-headers/media/ |
| cam_isp.h | 157 * @lane_num: active lane number
188 uint32_t lane_num; member in struct:cam_isp_in_port_info
|
| /device/google/crosshatch/sdm845/kernel-headers/media/ |
| cam_isp.h | 105 uint32_t lane_num; member in struct:cam_isp_in_port_info
|
| /device/google/crosshatch/sdm845/original-kernel-headers/media/ |
| cam_isp.h | 157 * @lane_num: active lane number
188 uint32_t lane_num; member in struct:cam_isp_in_port_info
|
| /external/u-boot/drivers/video/exynos/ |
| exynos_dp.c | 416 unsigned char lane_num, unsigned char *sw, unsigned char *em)
423 /* lane_num value is used as array index, so this range 0 ~ 3 */
424 dpcd_addr = DPCD_ADJUST_REQUEST_LANE0_1 + (lane_num / 2);
432 *sw = ((buf >> shift_val[lane_num]) & 0x03);
433 *em = ((buf >> shift_val[lane_num]) & 0x0c) >> 2;
|
| /external/tensorflow/tensorflow/lite/kernels/internal/optimized/ |
| depthwiseconv_uint8_3x3_filter.h | 42 #define vst1_lane_8x4(dst, reg, lane_num) \
44 vst1_lane_u32(reinterpret_cast<uint32_t*>(dst), reg, lane_num)
45 #define vst1q_lane_8x4(dst, reg, lane_num) \
47 vst1q_lane_u32(reinterpret_cast<uint32_t*>(dst), reg, lane_num)
49 #define vld1q_lane_s8x8(src, reg, lane_num) \
50 vld1q_lane_u64(reinterpret_cast<const uint64_t*>(src), reg, lane_num)
51 #define vld1_lane_8x4(src, reg, lane_num) \
52 vld1_lane_s32(reinterpret_cast<const int32*>(src), reg, lane_num)
53 #define vld1q_lane_8x4(src, reg, lane_num) \
54 vld1q_lane_s32(reinterpret_cast<const int32*>(src), reg, lane_num)
[all...] |
| depthwiseconv_uint8_transitional.h | 44 #define vst1_lane_8x4(dst, reg, lane_num) \
46 vst1_lane_u32(reinterpret_cast<uint32_t*>(dst), reg, lane_num)
47 #define vst1q_lane_8x4(dst, reg, lane_num) \
49 vst1q_lane_u32(reinterpret_cast<uint32_t*>(dst), reg, lane_num)
51 #define vld1q_lane_s8x8(src, reg, lane_num) \
52 vld1q_lane_u64(reinterpret_cast<const uint64_t*>(src), reg, lane_num)
53 #define vld1_lane_8x4(src, reg, lane_num) \
54 vld1_lane_s32(reinterpret_cast<const int32*>(src), reg, lane_num)
55 #define vld1q_lane_8x4(src, reg, lane_num) \
56 vld1q_lane_s32(reinterpret_cast<const int32*>(src), reg, lane_num)
[all...] |
