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/external/u-boot/arch/arm/mach-exynos/ | |
dmc_init_ddr3.c | 31 writel(DDR3PHY_CTRL_PHY_RESET_OFF, &clk->lpddr3phy_ctrl); 32 writel(DDR3PHY_CTRL_PHY_RESET, &clk->lpddr3phy_ctrl); |
/external/u-boot/arch/arm/mach-exynos/include/mach/ | |
clock.h | 851 unsigned int lpddr3phy_ctrl; member in struct:exynos5_clock 1266 unsigned int lpddr3phy_ctrl; member in struct:exynos5420_clock [all...] |