| /external/u-boot/drivers/mtd/ |
| altera_qspi.c | 43 u32 mem_op; member in struct:altera_qspi_regs
169 writel(sect, ®s->mem_op);
262 u32 mem_op; local
281 mem_op = (sr_tb << 12) | (sr_bp << 8);
282 mem_op |= QUADSPI_MEM_OP_SECTOR_PROTECT;
283 debug("lock %08x\n", mem_op);
284 writel(mem_op, ®s->mem_op);
294 u32 mem_op; local
296 mem_op = QUADSPI_MEM_OP_SECTOR_PROTECT
[all...] |
| /art/compiler/optimizing/ |
| common_arm64.h | 209 const vixl::aarch64::MemOperand& mem_op) {
210 if (mem_op.IsImmediateOffset()) {
211 return vixl::aarch64::Operand(mem_op.GetOffset());
213 DCHECK(mem_op.IsRegisterOffset());
214 if (mem_op.GetExtend() != vixl::aarch64::NO_EXTEND) {
215 return vixl::aarch64::Operand(mem_op.GetRegisterOffset(),
216 mem_op.GetExtend(),
217 mem_op.GetShiftAmount());
218 } else if (mem_op.GetShift() != vixl::aarch64::NO_SHIFT) {
219 return vixl::aarch64::Operand(mem_op.GetRegisterOffset()
[all...] |
| intrinsics_arm64.cc | 759 MemOperand mem_op(base.X(), offset);
761 codegen->LoadAcquire(invoke, trg, mem_op, /* needs_null_check= */ true);
763 codegen->Load(type, trg, mem_op);
[all...] |
| /external/vixl/test/aarch64/ |
| test-abi.cc | 78 #define CHECK_NEXT_PARAMETER_MEM(type, mem_op, size) \
80 expected = GenericOperand(mem_op, size); \
|
| /bionic/libc/kernel/uapi/linux/ |
| perf_event.h | 355 __u64 mem_op : 5, mem_lvl : 14, mem_snoop : 5, mem_lock : 2, mem_dtlb : 7, mem_lvl_num : 4, mem_remote : 1, mem_snoopx : 2, mem_rsvd : 24; member in struct:perf_mem_data_src::__anon967
362 __u64 mem_rsvd : 24, mem_snoopx : 2, mem_remote : 1, mem_lvl_num : 4, mem_dtlb : 7, mem_lock : 2, mem_snoop : 5, mem_lvl : 14, mem_op : 5; member in struct:perf_mem_data_src::__anon968
|
| /external/kernel-headers/original/uapi/linux/ |
| perf_event.h | 1003 __u64 mem_op:5, /* type of opcode */ member in struct:perf_mem_data_src::__anon25859
1026 mem_op:5; /* type of opcode */ member in struct:perf_mem_data_src::__anon25860
[all...] |
| /external/vixl/src/aarch64/ |
| operands-aarch64.cc | 506 GenericOperand::GenericOperand(const MemOperand& mem_op, size_t mem_op_size)
507 : cpu_register_(NoReg), mem_op_(mem_op), mem_op_size_(mem_op_size) {
|
| macro-assembler-aarch64.cc | [all...] |
| simulator-aarch64.cc | 485 uint64_t Simulator::ComputeMemOperandAddress(const MemOperand& mem_op) const {
486 VIXL_ASSERT(mem_op.IsValid());
487 int64_t base = ReadRegister<int64_t>(mem_op.GetBaseRegister());
488 if (mem_op.IsImmediateOffset()) {
489 return base + mem_op.GetOffset();
491 VIXL_ASSERT(mem_op.GetRegisterOffset().IsValid());
492 int64_t offset = ReadRegister<int64_t>(mem_op.GetRegisterOffset());
493 unsigned shift_amount = mem_op.GetShiftAmount();
494 if (mem_op.GetShift() != NO_SHIFT) {
495 offset = ShiftOperand(kXRegSize, offset, mem_op.GetShift(), shift_amount)
[all...] |
| operands-aarch64.h | 931 GenericOperand(const MemOperand& mem_op,
[all...] |
| macro-assembler-aarch64.h | 727 void ComputeAddress(const Register& dst, const MemOperand& mem_op);
[all...] |
| simulator-aarch64.h | [all...] |
| /external/perf_data_converter/src/quipper/kernel/ |
| perf_event.h | 819 __u64 mem_op : 5, /* type of opcode */ member in struct:perf_mem_data_src::__anon35762
|
| /external/mesa3d/src/gallium/drivers/r600/sb/ |
| sb_bc_builder.cpp | 567 unsigned mem_op = 4; local
571 mem_op = 5;
577 .MEM_OP(mem_op)
|
| sb_bc_decoder.cpp | 414 unsigned mem_op = (dw0 >> 8) & 0x7; local
416 if (mem_op == 4) {
422 } else if (mem_op == 5)
|
