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    Searched refs:pllcr1 (Results 1 - 7 of 7) sorted by null

  /external/u-boot/board/freescale/b4860qds/
b4860qds.c 632 u32 fcap, dcbias, bcap, pllcr1, pllcr0; local
657 clrbits_be32(&srds_regs->bank[pll_num].pllcr1,
659 setbits_be32(&srds_regs->bank[pll_num].pllcr1,
682 setbits_be32(&srds_regs->bank[pll_num].pllcr1,
684 clrbits_be32(&srds_regs->bank[pll_num].pllcr1,
686 setbits_be32(&srds_regs->bank[pll_num].pllcr1,
690 clrbits_be32(&srds_regs->bank[pll_num].pllcr1,
692 pllcr1 = (in_be32
693 (&srds_regs->bank[pll_num].pllcr1)|
695 out_be32(&srds_regs->bank[pll_num].pllcr1,
    [all...]
  /external/u-boot/arch/powerpc/cpu/mpc85xx/
fsl_corenet2_serdes.c 266 pll_cr1 = in_be32(&srds_regs->bank[pll_num].pllcr1);
269 out_be32(&srds_regs->bank[pll_num].pllcr1,
271 debug("A007186: pll_num=%x Updated PLLCR1=%x\n",
283 pll_cr1 = in_be32(&srds_regs->bank[pll_num].pllcr1);
285 out_be32(&srds_regs->bank[pll_num].pllcr1,
287 debug("A007186: pll_num=%x Updated PLLCR1=%x\n",
fsl_corenet_serdes.c 371 setbits_be32(&regs->bank[FSL_SRDS_BANK_3].pllcr1,
429 clrbits_be32(&regs->bank[FSL_SRDS_BANK_1].pllcr1,
437 clrbits_be32(&regs->bank[FSL_SRDS_BANK_1].pllcr1,
439 setbits_be32(&regs->bank[FSL_SRDS_BANK_3].pllcr1,
452 clrbits_be32(&regs->bank[bank].pllcr1,
  /external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
immap_lsch3.h 398 u32 pllcr1; /* PLL Control Register 1 */ member in struct:ccsr_serdes::__anon46567
immap_lsch2.h 567 u32 pllcr1; /* PLL Control Register 1 */ member in struct:ccsr_serdes::__anon46556
  /external/u-boot/arch/arm/include/asm/arch-ls102xa/
immap_ls102xa.h 345 u32 pllcr1; /* PLL Control Register 1 */ member in struct:ccsr_serdes::__anon46574
  /external/u-boot/arch/powerpc/include/asm/
immap_85xx.h 2564 u32 pllcr1; \/* PLL Control Register 1 *\/ member in struct:serdes_corenet::__anon46991
2637 u32 pllcr1; \/* PLL Control Register 1 *\/ member in struct:serdes_corenet::__anon46994
    [all...]

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