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      1 // SPDX-License-Identifier: GPL-2.0+
      2 /*
      3  * Renesas RCar IIC driver
      4  *
      5  * Copyright (C) 2017 Marek Vasut <marek.vasut (at) gmail.com>
      6  *
      7  * Based on
      8  * Copyright (C) 2011, 2013 Renesas Solutions Corp.
      9  * Copyright (C) 2011, 2013 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj (at) renesas.com>
     10  */
     11 
     12 #include <common.h>
     13 #include <clk.h>
     14 #include <dm.h>
     15 #include <i2c.h>
     16 #include <asm/io.h>
     17 
     18 struct rcar_iic_priv {
     19 	void __iomem		*base;
     20 	struct clk		clk;
     21 	u8			iccl;
     22 	u8			icch;
     23 };
     24 
     25 #define RCAR_IIC_ICDR		0x00
     26 #define RCAR_IIC_ICCR		0x04
     27 #define RCAR_IIC_ICSR		0x08
     28 #define RCAR_IIC_ICIC		0x0c
     29 #define RCAR_IIC_ICCL		0x10
     30 #define RCAR_IIC_ICCH		0x14
     31 
     32 /* ICCR */
     33 #define RCAR_IIC_ICCR_ICE	BIT(7)
     34 #define RCAR_IIC_ICCR_RACK	BIT(6)
     35 #define RCAR_IIC_ICCR_RTS	BIT(4)
     36 #define RCAR_IIC_ICCR_BUSY	BIT(2)
     37 #define RCAR_IIC_ICCR_SCP	BIT(0)
     38 
     39 /* ICSR / ICIC */
     40 #define RCAR_IC_BUSY		BIT(4)
     41 #define RCAR_IC_TACK		BIT(2)
     42 #define RCAR_IC_DTE		BIT(0)
     43 
     44 #define IRQ_WAIT 1000
     45 
     46 static void sh_irq_dte(struct udevice *dev)
     47 {
     48 	struct rcar_iic_priv *priv = dev_get_priv(dev);
     49 	int i;
     50 
     51 	for (i = 0; i < IRQ_WAIT; i++) {
     52 		if (RCAR_IC_DTE & readb(priv->base + RCAR_IIC_ICSR))
     53 			break;
     54 		udelay(10);
     55 	}
     56 }
     57 
     58 static int sh_irq_dte_with_tack(struct udevice *dev)
     59 {
     60 	struct rcar_iic_priv *priv = dev_get_priv(dev);
     61 	int i;
     62 
     63 	for (i = 0; i < IRQ_WAIT; i++) {
     64 		if (RCAR_IC_DTE & readb(priv->base + RCAR_IIC_ICSR))
     65 			break;
     66 		if (RCAR_IC_TACK & readb(priv->base + RCAR_IIC_ICSR))
     67 			return -ETIMEDOUT;
     68 		udelay(10);
     69 	}
     70 	return 0;
     71 }
     72 
     73 static void sh_irq_busy(struct udevice *dev)
     74 {
     75 	struct rcar_iic_priv *priv = dev_get_priv(dev);
     76 	int i;
     77 
     78 	for (i = 0; i < IRQ_WAIT; i++) {
     79 		if (!(RCAR_IC_BUSY & readb(priv->base + RCAR_IIC_ICSR)))
     80 			break;
     81 		udelay(10);
     82 	}
     83 }
     84 
     85 static int rcar_iic_set_addr(struct udevice *dev, u8 chip, u8 read)
     86 {
     87 	struct rcar_iic_priv *priv = dev_get_priv(dev);
     88 
     89 	clrbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
     90 	setbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
     91 
     92 	writeb(priv->iccl, priv->base + RCAR_IIC_ICCL);
     93 	writeb(priv->icch, priv->base + RCAR_IIC_ICCH);
     94 	writeb(RCAR_IC_TACK, priv->base + RCAR_IIC_ICIC);
     95 
     96 	writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS | RCAR_IIC_ICCR_BUSY,
     97 	       priv->base + RCAR_IIC_ICCR);
     98 	sh_irq_dte(dev);
     99 
    100 	clrbits_8(priv->base + RCAR_IIC_ICSR, RCAR_IC_TACK);
    101 	writeb(chip << 1 | read, priv->base + RCAR_IIC_ICDR);
    102 	return sh_irq_dte_with_tack(dev);
    103 }
    104 
    105 static void rcar_iic_finish(struct udevice *dev)
    106 {
    107 	struct rcar_iic_priv *priv = dev_get_priv(dev);
    108 
    109 	writeb(0, priv->base + RCAR_IIC_ICSR);
    110 	clrbits_8(priv->base + RCAR_IIC_ICCR, RCAR_IIC_ICCR_ICE);
    111 }
    112 
    113 static int rcar_iic_read_common(struct udevice *dev, struct i2c_msg *msg)
    114 {
    115 	struct rcar_iic_priv *priv = dev_get_priv(dev);
    116 	int i, ret = -EREMOTEIO;
    117 
    118 	if (rcar_iic_set_addr(dev, msg->addr, 1) != 0)
    119 		goto err;
    120 
    121 	udelay(10);
    122 
    123 	writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_SCP,
    124 	       priv->base + RCAR_IIC_ICCR);
    125 
    126 	for (i = 0; i < msg->len; i++) {
    127 		if (sh_irq_dte_with_tack(dev) != 0)
    128 			goto err;
    129 
    130 		msg->buf[i] = readb(priv->base + RCAR_IIC_ICDR) & 0xff;
    131 
    132 		if (msg->len - 1 == i) {
    133 			writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RACK,
    134 			       priv->base + RCAR_IIC_ICCR);
    135 		}
    136 	}
    137 
    138 	sh_irq_busy(dev);
    139 	ret = 0;
    140 
    141 err:
    142 	rcar_iic_finish(dev);
    143 	return ret;
    144 }
    145 
    146 static int rcar_iic_write_common(struct udevice *dev, struct i2c_msg *msg)
    147 {
    148 	struct rcar_iic_priv *priv = dev_get_priv(dev);
    149 	int i, ret = -EREMOTEIO;
    150 
    151 	if (rcar_iic_set_addr(dev, msg->addr, 0) != 0)
    152 		goto err;
    153 
    154 	udelay(10);
    155 
    156 	for (i = 0; i < msg->len; i++) {
    157 		writeb(msg->buf[i], priv->base + RCAR_IIC_ICDR);
    158 		if (sh_irq_dte_with_tack(dev) != 0)
    159 			goto err;
    160 	}
    161 
    162 	if (msg->flags & I2C_M_STOP) {
    163 		writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_RTS,
    164 		       priv->base + RCAR_IIC_ICCR);
    165 		if (sh_irq_dte_with_tack(dev) != 0)
    166 			goto err;
    167 	}
    168 
    169 	sh_irq_busy(dev);
    170 	ret = 0;
    171 
    172 err:
    173 	rcar_iic_finish(dev);
    174 	return ret;
    175 }
    176 
    177 static int rcar_iic_xfer(struct udevice *dev, struct i2c_msg *msg, int nmsgs)
    178 {
    179 	int ret;
    180 
    181 	for (; nmsgs > 0; nmsgs--, msg++) {
    182 		if (msg->flags & I2C_M_RD)
    183 			ret = rcar_iic_read_common(dev, msg);
    184 		else
    185 			ret = rcar_iic_write_common(dev, msg);
    186 
    187 		if (ret)
    188 			return -EREMOTEIO;
    189 	}
    190 
    191 	return ret;
    192 }
    193 
    194 static int rcar_iic_set_speed(struct udevice *dev, uint speed)
    195 {
    196 	struct rcar_iic_priv *priv = dev_get_priv(dev);
    197 	const unsigned int ratio_high = 4;
    198 	const unsigned int ratio_low = 5;
    199 	int clkrate, denom;
    200 
    201 	clkrate = clk_get_rate(&priv->clk);
    202 	if (clkrate < 0)
    203 		return clkrate;
    204 
    205 	/*
    206 	 * Calculate the value for ICCL and ICCH. From the data sheet:
    207 	 * iccl = (p-clock / transfer-rate) * (L / (L + H))
    208 	 * icch = (p clock / transfer rate) * (H / (L + H))
    209 	 * where L and H are the SCL low and high ratio.
    210 	 */
    211 	denom = speed * (ratio_high + ratio_low);
    212 	priv->iccl = DIV_ROUND_CLOSEST(clkrate * ratio_low, denom);
    213 	priv->icch = DIV_ROUND_CLOSEST(clkrate * ratio_high, denom);
    214 
    215 	return 0;
    216 }
    217 
    218 static int rcar_iic_probe_chip(struct udevice *dev, uint addr, uint flags)
    219 {
    220 	struct rcar_iic_priv *priv = dev_get_priv(dev);
    221 	int ret;
    222 
    223 	rcar_iic_set_addr(dev, addr, 1);
    224 	writeb(RCAR_IIC_ICCR_ICE | RCAR_IIC_ICCR_SCP,
    225 	       priv->base + RCAR_IIC_ICCR);
    226 	ret = sh_irq_dte_with_tack(dev);
    227 	rcar_iic_finish(dev);
    228 
    229 	return ret;
    230 }
    231 
    232 static int rcar_iic_probe(struct udevice *dev)
    233 {
    234 	struct rcar_iic_priv *priv = dev_get_priv(dev);
    235 	int ret;
    236 
    237 	priv->base = dev_read_addr_ptr(dev);
    238 
    239 	ret = clk_get_by_index(dev, 0, &priv->clk);
    240 	if (ret)
    241 		return ret;
    242 
    243 	ret = clk_enable(&priv->clk);
    244 	if (ret)
    245 		return ret;
    246 
    247 	rcar_iic_finish(dev);
    248 
    249 	return rcar_iic_set_speed(dev, 100000);
    250 }
    251 
    252 static const struct dm_i2c_ops rcar_iic_ops = {
    253 	.xfer		= rcar_iic_xfer,
    254 	.probe_chip	= rcar_iic_probe_chip,
    255 	.set_bus_speed	= rcar_iic_set_speed,
    256 };
    257 
    258 static const struct udevice_id rcar_iic_ids[] = {
    259 	{ .compatible = "renesas,rmobile-iic" },
    260 	{ }
    261 };
    262 
    263 U_BOOT_DRIVER(iic_rcar) = {
    264 	.name		= "iic_rcar",
    265 	.id		= UCLASS_I2C,
    266 	.of_match	= rcar_iic_ids,
    267 	.probe		= rcar_iic_probe,
    268 	.priv_auto_alloc_size = sizeof(struct rcar_iic_priv),
    269 	.ops		= &rcar_iic_ops,
    270 };
    271