/external/vixl/test/aarch32/ |
test-assembler-cond-rd-rn-rm-a32.cc | 61 M(shadd16) \ 473 #include "aarch32/traces/assembler-cond-rd-rn-rm-shadd16-a32.h" [all...] |
test-assembler-cond-rd-rn-rm-t32.cc | 60 M(shadd16) \ 471 #include "aarch32/traces/assembler-cond-rd-rn-rm-shadd16-t32.h" [all...] |
/external/vixl/src/aarch32/ |
assembler-aarch32.h | 3030 void shadd16(Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler [all...] |
disasm-aarch32.h | [all...] |
assembler-aarch32.cc | 9679 void Assembler::shadd16(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler [all...] |
disasm-aarch32.cc | 2482 void Disassembler::shadd16(Condition cond, function in class:vixl::aarch32::Disassembler [all...] |
macro-assembler-aarch32.h | [all...] |
/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
basic-arm-instructions.s | [all...] |
/external/capstone/suite/MC/ARM/ |
basic-arm-instructions.s.cs | 631 0x12,0x4f,0x38,0xe6 = shadd16 r4, r8, r2 [all...] |
/external/llvm/test/MC/ARM/ |
basic-arm-instructions.s | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
basic-arm-instructions.s | [all...] |