/external/u-boot/arch/arm/mach-socfpga/ |
spl.c | 52 socfpga_per_reset(SOCFPGA_RESET(NAND), 0); 56 socfpga_per_reset(SOCFPGA_RESET(SDMMC), 0); 57 socfpga_per_reset(SOCFPGA_RESET(DMA), 0); 61 socfpga_per_reset(SOCFPGA_RESET(QSPI), 0); 118 socfpga_per_reset(SOCFPGA_RESET(SDR), 0); 119 socfpga_per_reset(SOCFPGA_RESET(UART0), 0); 120 socfpga_per_reset(SOCFPGA_RESET(OSC1TIMER0), 0);
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reset_manager_s10.c | 21 void socfpga_per_reset(u32 reset, int set) function 125 socfpga_per_reset(reset_emacocp, state); 128 socfpga_per_reset(reset_emac, state);
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misc_arria10.c | 64 socfpga_per_reset(reset, 0); 70 socfpga_per_reset(SOCFPGA_RESET(EMAC0), 1); 71 socfpga_per_reset(SOCFPGA_RESET(EMAC1), 1); 72 socfpga_per_reset(SOCFPGA_RESET(EMAC2), 1);
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misc_gen5.c | 62 socfpga_per_reset(reset, 0); 68 socfpga_per_reset(SOCFPGA_RESET(EMAC0), 1); 69 socfpga_per_reset(SOCFPGA_RESET(EMAC1), 1); 216 socfpga_per_reset(SOCFPGA_RESET(SPIM0), 0); 217 socfpga_per_reset(SOCFPGA_RESET(SPIM1), 0); 221 socfpga_per_reset(SOCFPGA_RESET(NAND), 0);
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misc.c | 136 socfpga_per_reset(SOCFPGA_RESET(L4WD0), 1); 137 socfpga_per_reset(SOCFPGA_RESET(L4WD0), 0);
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reset_manager_gen5.c | 19 void socfpga_per_reset(u32 reset, int set) function
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reset_manager_arria10.c | 37 socfpga_per_reset(SOCFPGA_RESET(UART1), assert); 39 socfpga_per_reset(SOCFPGA_RESET(UART0), assert); 258 void socfpga_per_reset(u32 reset, int set) function
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/external/u-boot/arch/arm/mach-socfpga/include/mach/ |
reset_manager.h | 11 void socfpga_per_reset(u32 reset, int set);
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reset_manager_s10.h | 15 void socfpga_per_reset(u32 reset, int set);
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