| /art/compiler/utils/ |
| managed_register.h | 95 ManagedRegisterSpill(const ManagedRegister& other, uint32_t size, uint32_t spill_offset)
96 : ManagedRegister(other), size_(size), spill_offset_(spill_offset) { }
|
| /external/v8/src/arm64/ |
| code-stubs-arm64.cc | 326 // 'spill_offset' is the offset from the stack pointer where
331 int stack_space, int spill_offset,
360 __ Poke(x19, (spill_offset + 0) * kXRegSize);
361 __ Poke(x20, (spill_offset + 1) * kXRegSize);
362 __ Poke(x21, (spill_offset + 2) * kXRegSize);
363 __ Poke(x22, (spill_offset + 3) * kXRegSize);
427 __ Peek(x19, (spill_offset + 0) * kXRegSize);
428 __ Peek(x20, (spill_offset + 1) * kXRegSize);
429 __ Peek(x21, (spill_offset + 2) * kXRegSize);
430 __ Peek(x22, (spill_offset + 3) * kXRegSize)
538 const int spill_offset = 1 + kApiStackSpace; local
610 const int spill_offset = 1 + kApiStackSpace; local
[all...] |
| /art/compiler/jni/quick/x86/ |
| calling_convention_x86.cc | 162 int32_t spill_offset = CurrentParamStackOffset().Uint32Value(); local
163 ManagedRegisterSpill spill(in_reg, size, spill_offset);
170 ManagedRegisterSpill spill2(in_reg, size, spill_offset + 4);
|
| /external/mesa3d/src/intel/compiler/ |
| brw_fs_reg_allocate.cpp | 755 uint32_t spill_offset, unsigned count)
771 spill_offset < (1 << 12) * REG_SIZE);
776 unspill_inst->offset = spill_offset;
784 spill_offset += reg_size * REG_SIZE;
790 uint32_t spill_offset, unsigned count)
800 spill_inst->offset = spill_offset + i * reg_size * REG_SIZE;
878 unsigned int spill_offset = last_scratch; local
879 assert(ALIGN(spill_offset, 16) == spill_offset); /* oword read/write req. */
916 int subset_spill_offset = spill_offset
[all...] |
| brw_vec4_reg_allocate.cpp | 508 unsigned int spill_offset = last_scratch; local
529 dst_reg(temp), inst->src[i], spill_offset);
538 emit_scratch_write(block, inst, spill_offset);
|
| /art/compiler/jni/quick/x86_64/ |
| calling_convention_x86_64.cc | 166 int32_t spill_offset = CurrentParamStackOffset().Uint32Value(); local
167 ManagedRegisterSpill spill(in_reg, size, spill_offset);
|
| /external/libunwind/src/ia64/ |
| Gparser.c | 251 off = sr->spill_offset;
306 sr->spill_offset = 0x10; /* default to psp+16 */
486 sr->spill_offset = 0x10 - 4 * pspoff;
|
| unwind_i.h | 456 long spill_offset; /* psp-relative offset for spill base */ member in struct:ia64_state_record
|
| /art/compiler/optimizing/ |
| code_generator_arm64.cc | 169 int64_t spill_offset,
189 int64_t max_ls_pair_offset = spill_offset + core_spill_size + fp_spill_size - 2 * reg_size;
196 __ Add(new_base, base, Operand(spill_offset + core_spill_size));
198 spill_offset = -core_spill_size;
200 DCHECK(masm->IsImmLSPair(spill_offset, ls_access_size));
205 __ StoreCPURegList(core_list, MemOperand(base, spill_offset));
206 __ StoreCPURegList(fp_list, MemOperand(base, spill_offset + core_spill_size));
208 __ LoadCPURegList(core_list, MemOperand(base, spill_offset));
209 __ LoadCPURegList(fp_list, MemOperand(base, spill_offset + core_spill_size));
[all...] |
