| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-rn-rm-a32.cc | 99 M(ssub8) \
493 #include "aarch32/traces/assembler-cond-rd-rn-rm-ssub8-a32.h"
[all...] |
| test-assembler-cond-rd-rn-rm-t32.cc | 98 M(ssub8) \
491 #include "aarch32/traces/assembler-cond-rd-rn-rm-ssub8-t32.h"
[all...] |
| /external/vixl/src/aarch32/ |
| assembler-aarch32.h | 3260 void ssub8(Register rd, Register rn, Register rm) { ssub8(al, rd, rn, rm); } function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.h | [all...] |
| assembler-aarch32.cc | 10888 void Assembler::ssub8(Condition cond, Register rd, Register rn, Register rm) { function in class:vixl::aarch32::Assembler
[all...] |
| disasm-aarch32.cc | 2939 void Disassembler::ssub8(Condition cond, function in class:vixl::aarch32::Disassembler
[all...] |
| macro-assembler-aarch32.h | [all...] |
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/capstone/suite/MC/ARM/ |
| basic-arm-instructions.s.cs | 762 0xf4,0x9f,0x12,0xe6 = ssub8 r9, r2, r4
[all...] |
| basic-thumb2-instructions.s.cs | 834 0xc2,0xfa,0x04,0xf9 = ssub8 r9, r2, r4
[all...] |
| /external/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
