HomeSort by relevance Sort by last modified time
    Searched refs:wdog (Results 1 - 25 of 30) sorted by null

1 2

  /external/u-boot/drivers/watchdog/
ulp_wdog.c 11 * MX7ULP WDOG Register Map
45 struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR; local
47 writel(val, &wdog->toval);
52 struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR; local
54 writel(REFRESH_WORD0, &wdog->cnt);
55 writel(REFRESH_WORD1, &wdog->cnt);
61 struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR; local
63 writel(UNLOCK_WORD0, &wdog->cnt);
64 writel(UNLOCK_WORD1, &wdog->cnt);
66 val = readb(&wdog->cs2)
81 struct wdog_regs *wdog = (struct wdog_regs *)WDOG_BASE_ADDR; local
    [all...]
imx_watchdog.c 16 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; local
18 writew(0x5555, &wdog->wsr);
19 writew(0xaaaa, &wdog->wsr);
24 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; local
37 WCR_WDA | SET_WCR_WT(timeout), &wdog->wcr);
44 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; local
46 clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE);
48 writew(0x5555, &wdog->wsr);
49 writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */
bcm2835_wdt.c 11 #include <asm/arch/wdog.h>
  /external/u-boot/arch/arm/include/asm/arch-mx7/
sys_proto.h 10 void set_wdog_reset(struct wdog_regs *wdog);
  /external/u-boot/arch/arm/include/asm/arch-mx8m/
sys_proto.h 11 void set_wdog_reset(struct wdog_regs *wdog);
  /external/u-boot/arch/arm/mach-bcm283x/include/mach/
wdog.h 19 u32 wdog; member in struct:bcm2835_wdog_regs
  /external/u-boot/arch/arm/mach-sunxi/
board.c 274 static const struct sunxi_wdog *wdog = local
275 &((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
278 writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
279 writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl);
283 writel(WDT_MODE_RESET_EN | WDT_MODE_EN, &wdog->mode);
286 static const struct sunxi_wdog *wdog =
287 ((struct sunxi_timer_reg *)SUNXI_TIMER_BASE)->wdog;
290 writel(WDT_CFG_RESET, &wdog->cfg);
291 writel(WDT_MODE_EN, &wdog->mode);
292 writel(WDT_CTRL_KEY | WDT_CTRL_RESTART, &wdog->ctl)
    [all...]
  /external/u-boot/arch/arm/include/asm/arch-sunxi/
timer.h 70 struct sunxi_wdog wdog; /* 0x90 */ member in struct:sunxi_timer_reg
81 struct sunxi_wdog wdog[5]; /* We have 5 watchdogs */ member in struct:sunxi_timer_reg
  /external/u-boot/arch/arm/mach-bcm283x/
reset.c 11 #include <asm/arch/wdog.h>
49 writel(BCM2835_WDOG_PASSWORD | timeout, &wdog_regs->wdog);
  /external/u-boot/arch/arm/mach-imx/mx7/
soc.c 239 void set_wdog_reset(struct wdog_regs *wdog)
241 u32 reg = readw(&wdog->wcr);
247 reg = readw(&wdog->wcr);
254 writew(reg, &wdog->wcr);
psci-mx7.c 88 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; local
93 writew(WCR_WDE, &wdog->wcr);
  /external/u-boot/arch/arm/mach-imx/mx8m/
soc.c 60 void set_wdog_reset(struct wdog_regs *wdog)
69 setbits_le16(&wdog->wcr, WDOG_WDT_MASK | WDOG_WDZST_MASK);
216 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; local
219 writew((WCR_WDE | WCR_SRS), &wdog->wcr);
  /external/u-boot/drivers/mmc/
davinci_mmc.c 60 uint wdog = WATCHDOG_COUNT; local
62 while (--wdog && ((get_val(&regs->mmcst1) & status) != status))
68 if (wdog == 0)
77 uint wdog = WATCHDOG_COUNT; local
79 while (--wdog && (get_val(&regs->mmcst1) & MMCST1_BUSY))
82 if (wdog == 0)
92 uint wdog = WATCHDOG_COUNT; local
95 while (wdog--) {
  /external/u-boot/board/warp7/
warp7.c 205 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; local
213 set_wdog_reset(wdog);
219 clrsetbits_le16(&wdog->wcr, 0, 0x10);
  /external/u-boot/arch/arm/mach-davinci/
dm365_lowlevel.c 266 struct davinci_timer *wdog = local
275 writel(DV_WDT_ENABLE_SYS_RESET, &wdog->na1);
276 writel(DV_WDT_TRIGGER_SYS_RESET, &wdog->na2);
284 struct davinci_timer *wdog = local
296 writel(DV_WDT_ENABLE_SYS_RESET, &wdog->na1);
297 writel(DV_WDT_TRIGGER_SYS_RESET, &wdog->na2);
  /external/u-boot/arch/m68k/cpu/mcf523x/
cpu_init.c 40 wdog_t *wdog = (wdog_t *) MMAP_WDOG; local
45 out_be16(&wdog->cr, 0);
  /external/u-boot/board/compulab/cl-som-imx7/
cl-som-imx7.c 301 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; local
304 set_wdog_reset(wdog);
309 clrsetbits_le16(&wdog->wcr, 0, 0x10);
  /external/u-boot/board/technexion/pico-imx7d/
pico-imx7d.c 263 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; local
267 set_wdog_reset(wdog);
273 clrsetbits_le16(&wdog->wcr, 0, 0x10);
  /external/u-boot/board/freescale/mx7dsabresd/
mx7dsabresd.c 368 struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; local
372 set_wdog_reset(wdog);
378 clrsetbits_le16(&wdog->wcr, 0, 0x10);
  /external/u-boot/arch/arm/cpu/armv7/ls102xa/
cpu.c 372 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR; local
374 clrbits_be16(&wdog->wcr, WCR_SRS);
  /external/u-boot/arch/m68k/cpu/mcf532x/
cpu_init.c 211 wdog_t *wdog = (wdog_t *) MMAP_WDOG; local
214 out_be16(&wdog->cr, 0);
  /external/u-boot/arch/arm/dts/
fsl-imx8mq.dtsi 384 wdog1: wdog@30280000 {
392 wdog2: wdog@30290000 {
400 wdog3: wdog@302a0000 {
imx7s.dtsi 432 wdog1: wdog@30280000 {
439 wdog2: wdog@30290000 {
447 wdog3: wdog@302a0000 {
455 wdog4: wdog@302b0000 {
imx6ul.dtsi 494 wdog1: wdog@020bc000 {
501 wdog2: wdog@020c0000 {
879 wdog3: wdog@021e4000 {
imx7ulp.dtsi 347 wdog1: wdog@403D0000 {
362 wdog2: wdog@40430000 {

Completed in 2299 milliseconds

1 2