| /external/swiftshader/third_party/LLVM/include/llvm/MC/ |
| MCInst.h | 98 MCOperand Op;
99 Op.Kind = kRegister;
100 Op.RegVal = Reg;
101 return Op;
104 MCOperand Op;
105 Op.Kind = kImmediate;
106 Op.ImmVal = Val;
107 return Op;
110 MCOperand Op;
111 Op.Kind = kFPImmediate
[all...] |
| /external/llvm/lib/Target/BPF/InstPrinter/ |
| BPFInstPrinter.cpp | 55 const MCOperand &Op = MI->getOperand(OpNo);
56 if (Op.isReg()) {
57 O << getRegisterName(Op.getReg());
58 } else if (Op.isImm()) {
59 O << (int32_t)Op.getImm();
61 assert(Op.isExpr() && "Expected an expression");
62 printExpr(Op.getExpr(), O);
83 const MCOperand &Op = MI->getOperand(OpNo);
84 if (Op.isImm())
85 O << (uint64_t)Op.getImm()
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 75 SDValue LegalizeOp(SDValue Op);
78 SDValue TranslateLegalizeResults(SDValue Op, SDValue Result);
81 SDValue UnrollVSETCC(SDValue Op);
87 SDValue Expand(SDValue Op);
94 SDValue ExpandUINT_TO_FLOAT(SDValue Op);
97 SDValue ExpandSEXTINREG(SDValue Op);
104 SDValue ExpandANY_EXTEND_VECTOR_INREG(SDValue Op);
111 SDValue ExpandSIGN_EXTEND_VECTOR_INREG(SDValue Op);
117 SDValue ExpandZERO_EXTEND_VECTOR_INREG(SDValue Op);
120 SDValue ExpandBSWAP(SDValue Op);
[all...] |
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| MachineOperand.h | 472 MachineOperand Op(MachineOperand::MO_Immediate);
473 Op.setImm(Val);
474 return Op;
478 MachineOperand Op(MachineOperand::MO_CImmediate);
479 Op.Contents.CI = CI;
480 return Op;
484 MachineOperand Op(MachineOperand::MO_FPImmediate);
485 Op.Contents.CFP = CFP;
486 return Op;
495 MachineOperand Op(MachineOperand::MO_Register)
[all...] |
| MachineRegisterInfo.h | 348 MachineOperand *Op;
349 explicit defusechain_iterator(MachineOperand *op) : Op(op) {
352 if (op) {
353 if ((!ReturnUses && op->isUse()) ||
354 (!ReturnDefs && op->isDef()) ||
355 (SkipDebug && op->isDebug()))
366 defusechain_iterator(const defusechain_iterator &I) : Op(I.Op) {}
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 253 static void printTargetFlags(raw_ostream& OS, const MachineOperand &Op);
739 MachineOperand Op(MachineOperand::MO_Immediate);
740 Op.setImm(Val);
741 return Op;
745 MachineOperand Op(MachineOperand::MO_CImmediate);
746 Op.Contents.CI = CI;
747 return Op;
751 MachineOperand Op(MachineOperand::MO_FPImmediate);
752 Op.Contents.CFP = CFP;
753 return Op;
[all...] |
| /external/deqp-deps/SPIRV-Headers/example/ |
| example-1.1.cpp | 37 const spv::Op kNop = spv::OpNop;
40 const spv::Op kNamedBarrierInit = spv::OpNamedBarrierInitialize;
|
| /external/shaderc/spirv-headers/example/ |
| example-1.1.cpp | 37 const spv::Op kNop = spv::OpNop;
40 const spv::Op kNamedBarrierInit = spv::OpNamedBarrierInitialize;
|
| /external/swiftshader/third_party/SPIRV-Headers/example/ |
| example-1.1.cpp | 37 const spv::Op kNop = spv::OpNop;
40 const spv::Op kNamedBarrierInit = spv::OpNamedBarrierInitialize;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/ |
| MCInstrDescView.cpp | 60 for (auto &Op : Operands)
61 if (Op.IsExplicit && Op.TiedToIndex < 0) {
63 Op.VariableIndex = VariableIndex;
68 for (auto &Op : Operands)
69 if (Op.TiedToIndex >= 0)
70 Op.VariableIndex = Operands[Op.TiedToIndex].VariableIndex;
72 for (auto &Op : Operands)
73 if (Op.VariableIndex >= 0
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| R600ISelLowering.h | 36 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
72 SDValue lowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
73 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
74 SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
75 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
77 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
80 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
81 SDValue lowerFP_TO_UINT(SDValue Op, SelectionDAG &DAG) const;
82 SDValue lowerFP_TO_SINT(SDValue Op, SelectionDAG &DAG) const;
84 SDValue lowerPrivateExtLoad(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/InstPrinter/ |
| AVRInstPrinter.cpp | 103 const MCOperand &Op = MI->getOperand(OpNo);
106 if (Op.isReg()) {
112 O << getRegisterName(Op.getReg(), AVR::ptr);
114 O << getPrettyRegisterName(Op.getReg(), MRI);
116 } else if (Op.isImm()) {
117 O << Op.getImm();
119 assert(Op.isExpr() && "Unknown operand kind in printOperand");
120 O << *Op.getExpr();
128 const MCOperand &Op = MI->getOperand(OpNo);
130 if (Op.isImm())
[all...] |
| /external/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.h | 35 SDValue LowerEXTRACT_SUBVECTOR(SDValue Op, SelectionDAG &DAG) const;
36 SDValue LowerCONCAT_VECTORS(SDValue Op, SelectionDAG &DAG) const;
37 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
40 SDValue MergeVectorStore(const SDValue &Op, SelectionDAG &DAG) const;
44 SDValue LowerFREM(SDValue Op, SelectionDAG &DAG) const;
45 SDValue LowerFCEIL(SDValue Op, SelectionDAG &DAG) const;
46 SDValue LowerFTRUNC(SDValue Op, SelectionDAG &DAG) const;
47 SDValue LowerFRINT(SDValue Op, SelectionDAG &DAG) const;
48 SDValue LowerFNEARBYINT(SDValue Op, SelectionDAG &DAG) const;
50 SDValue LowerFROUND32(SDValue Op, SelectionDAG &DAG) const
[all...] |
| R600ISelLowering.h | 34 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
66 SDValue lowerFrameIndex(SDValue Op, SelectionDAG &DAG) const;
67 SDValue LowerEXTRACT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
68 SDValue LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const;
69 SDValue LowerGlobalAddress(AMDGPUMachineFunction *MFI, SDValue Op,
71 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
74 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
75 SDValue LowerFPTOUINT(SDValue Op, SelectionDAG &DAG) const;
77 SDValue lowerPrivateExtLoad(SDValue Op, SelectionDAG &DAG) const;
78 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/Target/XCore/InstPrinter/ |
| XCoreInstPrinter.cpp | 75 const MCOperand &Op = MI->getOperand(OpNo);
76 if (Op.isReg()) {
77 printRegName(O, Op.getReg());
81 if (Op.isImm()) {
82 O << Op.getImm();
86 assert(Op.isExpr() && "unknown operand kind in printOperand");
87 printExpr(Op.getExpr(), &MAI, O);
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/InstPrinter/ |
| MBlazeInstPrinter.cpp | 37 const MCOperand &Op = MI->getOperand(OpNo);
38 if (Op.isReg()) {
39 O << getRegisterName(Op.getReg());
40 } else if (Op.isImm()) {
41 O << (int32_t)Op.getImm();
43 assert(Op.isExpr() && "unknown operand kind in printOperand");
44 O << *Op.getExpr();
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/InstPrinter/ |
| Nios2InstPrinter.cpp | 43 const MCOperand &Op = MI->getOperand(OpNo);
44 if (Op.isReg()) {
45 printRegName(O, Op.getReg());
49 if (Op.isImm()) {
50 O << Op.getImm();
54 assert(Op.isExpr() && "unknown operand kind in printOperand");
55 Op.getExpr()->print(O, &MAI, true);
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/AsmParser/ |
| MBlazeAsmParser.cpp | 222 MBlazeOperand *Op = new MBlazeOperand(Token);
223 Op->Tok.Data = Str.data();
224 Op->Tok.Length = Str.size();
225 Op->StartLoc = S;
226 Op->EndLoc = S;
227 return Op;
231 MBlazeOperand *Op = new MBlazeOperand(Register);
232 Op->Reg.RegNum = RegNum;
233 Op->StartLoc = S;
234 Op->EndLoc = E
[all...] |
| /external/spirv-llvm/lib/SPIRV/ |
| SPIRVLowerBool.cpp | 79 auto Op = I.getOperand(0);
80 auto Zero = getScalarOrVectorConstantInt(Op->getType(), 0, false);
81 auto Cmp = new ICmpInst(&I, CmpInst::ICMP_NE, Op, Zero);
86 auto Op = I.getOperand(0);
87 if (isBoolType(Op->getType())) {
91 auto Sel = SelectInst::Create(Op, One, Zero, "", &I);
96 auto Op = I.getOperand(0);
97 if (isBoolType(Op->getType())) {
101 auto Sel = SelectInst::Create(Op, One, Zero, "", &I);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/Utils/ |
| Local.h | 47 Value *Op = *i;
49 if (Constant *OpC = dyn_cast<Constant>(Op)) {
75 if (Op->getType() != IntPtrTy)
76 Op = Builder->CreateIntCast(Op, IntPtrTy, true, Op->getName()+".c");
79 Op = Builder->CreateMul(Op, ConstantInt::get(IntPtrTy, Size),
84 Result = Builder->CreateAdd(Op, Result, GEP->getName()+".offs");
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/InstPrinter/ |
| X86InstPrinterCommon.cpp | 28 void X86InstPrinterCommon::printSSEAVXCC(const MCInst *MI, unsigned Op,
30 int64_t Imm = MI->getOperand(Op).getImm();
68 void X86InstPrinterCommon::printXOPCC(const MCInst *MI, unsigned Op,
70 int64_t Imm = MI->getOperand(Op).getImm();
84 void X86InstPrinterCommon::printRoundingControl(const MCInst *MI, unsigned Op,
86 int64_t Imm = MI->getOperand(Op).getImm() & 0x3;
101 const MCOperand &Op = MI->getOperand(OpNo);
102 if (Op.isImm())
103 O << formatImm(Op.getImm());
105 assert(Op.isExpr() && "unknown pcrel immediate operand")
[all...] |
| X86InstPrinterCommon.h | 27 void printSSEAVXCC(const MCInst *MI, unsigned Op, raw_ostream &OS);
28 void printXOPCC(const MCInst *MI, unsigned Op, raw_ostream &OS);
29 void printRoundingControl(const MCInst *MI, unsigned Op, raw_ostream &O);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
| LanaiISelLowering.h | 73 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
79 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
80 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
81 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
82 SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
83 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
84 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
85 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
86 SDValue LowerMUL(SDValue Op, SelectionDAG &DAG) const;
87 SDValue LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) const
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 403 SDValue MipsSETargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const {
405 return MipsTargetLowering::LowerOperation(Op, DAG);
407 EVT ResTy = Op->getValueType(0);
408 SDLoc DL(Op);
413 SDValue Tmp = DAG.getNode(MipsISD::MTC1_D64, DL, MVT::f64, Op->getOperand(0));
414 return DAG.getNode(MipsISD::FSELECT, DL, ResTy, Tmp, Op->getOperand(1),
415 Op->getOperand(2));
446 SDValue MipsSETargetLowering::LowerOperation(SDValue Op,
448 switch(Op.getOpcode()) {
449 case ISD::LOAD: return lowerLOAD(Op, DAG)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 360 SDValue MipsSETargetLowering::LowerOperation(SDValue Op,
362 switch(Op.getOpcode()) {
363 case ISD::LOAD: return lowerLOAD(Op, DAG);
364 case ISD::STORE: return lowerSTORE(Op, DAG);
365 case ISD::SMUL_LOHI: return lowerMulDiv(Op, MipsISD::Mult, true, true, DAG);
366 case ISD::UMUL_LOHI: return lowerMulDiv(Op, MipsISD::Multu, true, true, DAG);
367 case ISD::MULHS: return lowerMulDiv(Op, MipsISD::Mult, false, true, DAG);
368 case ISD::MULHU: return lowerMulDiv(Op, MipsISD::Multu, false, true, DAG);
369 case ISD::MUL: return lowerMulDiv(Op, MipsISD::Mult, true, false, DAG);
370 case ISD::SDIVREM: return lowerMulDiv(Op, MipsISD::DivRem, true, true, DAG)
[all...] |
