/external/clang/test/CodeGenCXX/ |
visibility-inlines-hidden.cpp | 141 template <int> inline void Op(); 144 Op<0>(); 147 template <int Idx_nocapture> void Op() {
|
/external/eigen/unsupported/Eigen/CXX11/src/TensorSymmetry/ |
StaticSymmetry.h | 142 template<typename Op, typename RV, std::size_t SGNumIndices, typename Index, std::size_t NumIndices, typename... Args> 147 initial = Op::run(tensor_static_symgroup_index_permute(idx, typename first::indices(), remaining_indices()), first::flags, initial, std::forward<Args>(args)...); 148 return tensor_static_symgroup_do_apply<internal::type_list<next...>>::template run<Op, RV, SGNumIndices>(idx, initial, args...); 151 template<typename Op, typename RV, std::size_t SGNumIndices, typename Index, typename... Args> 155 initial = Op::run(tensor_static_symgroup_index_permute(idx, typename first::indices()), first::flags, initial, std::forward<Args>(args)...); 156 return tensor_static_symgroup_do_apply<internal::type_list<next...>>::template run<Op, RV, SGNumIndices>(idx, initial, args...); 163 template<typename Op, typename RV, std::size_t SGNumIndices, typename Index, std::size_t NumIndices, typename... Args> 170 template<typename Op, typename RV, std::size_t SGNumIndices, typename Index, typename... Args> 196 template<typename Op, typename RV, typename Index, std::size_t N, typename... Args> 199 return internal::tensor_static_symgroup_do_apply<ge>::template run<Op, RV, NumIndices>(idx, initial, args...) [all...] |
/external/llvm/lib/CodeGen/AsmPrinter/ |
DwarfExpression.h | 41 virtual void EmitOp(uint8_t Op, const char *Comment = nullptr) = 0; 129 void EmitOp(uint8_t Op, const char *Comment = nullptr) override; 144 void EmitOp(uint8_t Op, const char *Comment = nullptr) override;
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 246 const RTLIB::Libcall Op; 306 setLibcallName(LC.Op, LC.Name); 308 setCmpLibcallCC(LC.Op, LC.Cond); 323 const RTLIB::Libcall Op; 412 setLibcallName(LC.Op, LC.Name); 413 setLibcallCallingConv(LC.Op, LC.CC); 415 setCmpLibcallCC(LC.Op, LC.Cond); 422 const RTLIB::Libcall Op; 435 setLibcallName(LC.Op, LC.Name); 436 setLibcallCallingConv(LC.Op, LC.CC) 9597 const MachineOperand& op = MI.getOperand(i); local [all...] |
/device/linaro/bootloader/edk2/MdeModulePkg/Include/Protocol/ |
EbcVmTest.h | 71 #define OPERAND1_REGDATA(pVM, Op) pVM->Gpr[OPERAND1_REGNUM (Op)]
72 #define OPERAND2_REGDATA(pVM, Op) pVM->Gpr[OPERAND2_REGNUM (Op)]
|
/external/llvm/include/llvm/IR/ |
OperandTraits.h | 117 template <int> inline Use &Op(); \ 118 template <int> inline const Use &Op() const; \ 150 template <int Idx_nocapture> Use &CLASS::Op() { \ 153 template <int Idx_nocapture> const Use &CLASS::Op() const { \
|
/external/llvm/include/llvm/Transforms/Utils/ |
Local.h | 205 Value *Op = *i; 207 if (Constant *OpC = dyn_cast<Constant>(Op)) { 233 if (Op->getType() != IntPtrTy) 234 Op = Builder->CreateIntCast(Op, IntPtrTy, true, Op->getName()+".c"); 237 Op = Builder->CreateMul(Op, ConstantInt::get(IntPtrTy, Size), 242 Result = Builder->CreateAdd(Op, Result, GEP->getName()+".offs");
|
/external/llvm/lib/Target/NVPTX/ |
NVPTXPeephole.cpp | 82 auto &Op = Root.getOperand(1); 85 if (Op.isReg() && TargetRegisterInfo::isVirtualRegister(Op.getReg())) { 86 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg());
|
/external/llvm/lib/Target/X86/ |
X86InstrInfo.h | 121 inline static bool isLeaMem(const MachineInstr &MI, unsigned Op) { 122 if (MI.getOperand(Op).isFI()) 124 return Op + X86::AddrSegmentReg <= MI.getNumOperands() && 125 MI.getOperand(Op + X86::AddrBaseReg).isReg() && 126 isScale(MI.getOperand(Op + X86::AddrScaleAmt)) && 127 MI.getOperand(Op + X86::AddrIndexReg).isReg() && 128 (MI.getOperand(Op + X86::AddrDisp).isImm() || 129 MI.getOperand(Op + X86::AddrDisp).isGlobal() || 130 MI.getOperand(Op + X86::AddrDisp).isCPI() || 131 MI.getOperand(Op + X86::AddrDisp).isJTI()) [all...] |
/external/skia/src/core/ |
SkAAClip.h | 43 bool op(const SkAAClip&, const SkAAClip&, SkRegion::Op); 45 // Helpers for op() 46 bool op(const SkIRect&, SkRegion::Op); 47 bool op(const SkRect&, SkRegion::Op, bool doAA); 48 bool op(const SkAAClip&, SkRegion::Op);
|
/external/skqp/src/core/ |
SkAAClip.h | 43 bool op(const SkAAClip&, const SkAAClip&, SkRegion::Op); 45 // Helpers for op() 46 bool op(const SkIRect&, SkRegion::Op); 47 bool op(const SkRect&, SkRegion::Op, bool doAA); 48 bool op(const SkAAClip&, SkRegion::Op);
|
/external/swiftshader/third_party/LLVM/include/llvm/ |
OperandTraits.h | 117 template <int> inline Use &Op(); \ 118 template <int> inline const Use &Op() const; \ 150 template <int Idx_nocapture> Use &CLASS::Op() { \ 153 template <int Idx_nocapture> const Use &CLASS::Op() const { \
|
/external/swiftshader/third_party/LLVM/lib/VMCore/ |
Metadata.cpp | 82 static MDNodeOperand *getOperandPtr(MDNode *N, unsigned Op) { 84 assert(Op <= N->getNumOperands() && "Invalid operand number"); 85 return reinterpret_cast<MDNodeOperand*>(N+1)+Op; 97 for (MDNodeOperand *Op = getOperandPtr(this, 0), *E = Op+NumOperands; 98 Op != E; ++Op, ++i) 99 new (Op) MDNodeOperand(Vals[i], this); 115 for (MDNodeOperand *Op = getOperandPtr(this, 0), *E = Op+NumOperands [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Analysis/ |
ObjCARCAnalysisUtils.h | 153 inline bool IsPotentialRetainableObjPtr(const Value *Op) { 156 if (isa<Constant>(Op) || isa<AllocaInst>(Op)) 159 if (const Argument *Arg = dyn_cast<Argument>(Op)) 170 PointerType *Ty = dyn_cast<PointerType>(Op->getType()); 178 inline bool IsPotentialRetainableObjPtr(const Value *Op, 181 if (!IsPotentialRetainableObjPtr(Op)) 185 if (AA.pointsToConstantMemory(Op)) 189 if (const LoadInst *LI = dyn_cast<LoadInst>(Op))
|
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
OperandTraits.h | 120 template <int> inline Use &Op(); \ 121 template <int> inline const Use &Op() const; \ 153 template <int Idx_nocapture> Use &CLASS::Op() { \ 156 template <int Idx_nocapture> const Use &CLASS::Op() const { \
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/IR/ |
TypeFinder.cpp | 157 for (Metadata *Op : V->operands()) { 158 if (!Op) 160 if (auto *N = dyn_cast<MDNode>(Op)) { 164 if (auto *C = dyn_cast<ConstantAsMetadata>(Op)) {
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
BPFISelLowering.h | 41 SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override; 71 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const; 72 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const; 73 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
NVPTXPeephole.cpp | 82 auto &Op = Root.getOperand(1); 85 if (Op.isReg() && TargetRegisterInfo::isVirtualRegister(Op.getReg())) { 86 GenericAddrDef = MRI.getUniqueVRegDef(Op.getReg());
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
X86InstrInfo.h | 147 inline static bool isLeaMem(const MachineInstr &MI, unsigned Op) { 148 if (MI.getOperand(Op).isFI()) 150 return Op + X86::AddrSegmentReg <= MI.getNumOperands() && 151 MI.getOperand(Op + X86::AddrBaseReg).isReg() && 152 isScale(MI.getOperand(Op + X86::AddrScaleAmt)) && 153 MI.getOperand(Op + X86::AddrIndexReg).isReg() && 154 (MI.getOperand(Op + X86::AddrDisp).isImm() || 155 MI.getOperand(Op + X86::AddrDisp).isGlobal() || 156 MI.getOperand(Op + X86::AddrDisp).isCPI() || 157 MI.getOperand(Op + X86::AddrDisp).isJTI()) [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-exegesis/lib/ |
MCInstrDescView.h | 62 const RegisterAliasingTracker *Tracker = nullptr; // Set for Register Op. 63 const llvm::MCOperandInfo *Info = nullptr; // Set for Explicit Op. 64 int TiedToIndex = -1; // Set for Reg&Explicit Op. 65 const llvm::MCPhysReg *ImplicitReg = nullptr; // Set for Implicit Op. 66 int VariableIndex = -1; // Set for Explicit Op. 97 llvm::MCOperand &getValueFor(const Operand &Op); 98 const llvm::MCOperand &getValueFor(const Operand &Op) const; 134 : Op(Operand), Reg(Reg) {} 136 const Operand *Op; // Pointer to an Explicit Register Operand.
|
/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
InstrDocsEmitter.cpp | 155 auto Op = II->Operands[i]; 157 if (Op.MINumOperands > 1) { 162 for (unsigned SubOpIdx = 0; SubOpIdx < Op.MINumOperands; ++SubOpIdx) { 164 cast<DefInit>(Op.MIOperandInfo->getArg(SubOpIdx))->getDef(); 165 StringRef SubOpName = Op.MIOperandInfo->getArgNameStr(SubOpIdx); 168 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() 169 << "/" << SubOpTypeName << ":$" << Op.Name << "."; 179 OS << "* " << (IsDef ? "DEF" : "USE") << " ``" << Op.Rec->getName() 180 << ":$" << Op.Name << "``\n\n";
|
/external/swiftshader/third_party/llvm-subzero/include/llvm/IR/ |
OperandTraits.h | 117 template <int> inline Use &Op(); \ 118 template <int> inline const Use &Op() const; \ 150 template <int Idx_nocapture> Use &CLASS::Op() { \ 153 template <int Idx_nocapture> const Use &CLASS::Op() const { \
|
/external/tensorflow/tensorflow/compiler/jit/ |
node_matchers_test.cc | 38 using testing::matchers::Op; 54 EXPECT_THAT(placeholder.node(), NodeWith(Op("Placeholder"))); 57 NodeWith(Op("Placeholder"), Name("placeholder"))); 59 NodeWith(Name("placeholder"), Op("Placeholder"))); 62 NodeWith(Op("Placeholder"), Name("placeholder"), Inputs())); 64 EXPECT_EQ(Explain(placeholder.node(), NodeWith(Op("Add"))), 65 "\nexpected op Add but found Placeholder"); 82 NodeWith(Op("Add"), Name("add"), 142 "\nexpected op Const but found Placeholder"); 191 EXPECT_THAT(add.node(), NodeWith(Inputs(Out(1, NodeWith(Op("Switch"))), _))) [all...] |
/external/tensorflow/tensorflow/java/src/main/java/org/tensorflow/op/ |
PrimitiveOp.java | 16 package org.tensorflow.op; 21 * A base class for {@link Op} implementations that are backed by a single {@link Operation}. 26 public abstract class PrimitiveOp implements Op { 29 public Operation op() { method in class:PrimitiveOp
|
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
ARMMCCodeEmitter.cpp | 229 unsigned getCCOutOpValue(const MCInst &MI, unsigned Op, 233 return MI.getOperand(Op).getReg() == ARM::CPSR; 237 unsigned getSOImmOpValue(const MCInst &MI, unsigned Op, 239 unsigned SoImm = MI.getOperand(Op).getImm(); 253 unsigned getT2SOImmOpValue(const MCInst &MI, unsigned Op, 255 unsigned SoImm = MI.getOperand(Op).getImm(); 271 unsigned getSORegRegOpValue(const MCInst &MI, unsigned Op, 273 unsigned getSORegImmOpValue(const MCInst &MI, unsigned Op, 275 unsigned getT2SORegOpValue(const MCInst &MI, unsigned Op, 278 unsigned getNEONVcvtImm32OpValue(const MCInst &MI, unsigned Op, [all...] |