| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | [all...] |
| /external/doclava/src/com/google/doclava/parser/ |
| JavaParser.java | 174 "<invalid>", "<EOR>", "<DOWN>", "<UP>", "IDENTIFIER", "INTLITERAL", "LONGLITERAL", "FLOATLITERAL", "DOUBLELITERAL", "CHARLITERAL", "STRINGLITERAL", "TRUE", "FALSE", "NULL", "IntegerNumber", "LongSuffix", "HexPrefix", "HexDigit", "Exponent", "NonIntegerNumber", "FloatSuffix", "DoubleSuffix", "EscapeSequence", "UNICODECHAR", "UNICODEPART", "WS", "COMMENT", "LINE_COMMENT", "ABSTRACT", "ASSERT", "BOOLEAN", "BREAK", "BYTE", "CASE", "CATCH", "CHAR", "CLASS", "CONST", "CONTINUE", "DEFAULT", "DO", "DOUBLE", "ELSE", "ENUM", "EXTENDS", "FINAL", "FINALLY", "FLOAT", "FOR", "GOTO", "IF", "IMPLEMENTS", "IMPORT", "INSTANCEOF", "INT", "INTERFACE", "LONG", "NATIVE", "NEW", "PACKAGE", "PRIVATE", "PROTECTED", "PUBLIC", "RETURN", "SHORT", "STATIC", "STRICTFP", "SUPER", "SWITCH", "SYNCHRONIZED", "THIS", "THROW", "THROWS", "TRANSIENT", "TRY", "VOID", "VOLATILE", "WHILE", "LPAREN", "RPAREN", "LBRACE", "RBRACE", "LBRACKET", "RBRACKET", "SEMI", "COMMA", "DOT", "ELLIPSIS", "EQ", "BANG", "TILDE", "QUES", "COLON", "EQEQ", "AMPAMP", "BARBAR", "PLUSPLUS", "SUBSUB", "PLUS", "SUB", "STAR", "SLASH", "AMP", "BAR", "CARET", "PERCENT", "PLUSEQ", "SUBEQ", "STAREQ", "SLASHEQ", "AMPEQ", "BAREQ", "CARETEQ", "PERCENTEQ", "MONKEYS_AT", "BANGEQ", "GT", "LT", "IdentifierStart", "IdentifierPart", "SurrogateIdentifer"
272 public static final int SUB=99;
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| X86ISelLowering.cpp | 360 // Add/Sub overflow ops with MVT::Glues are lowered to EFLAGS dependences.
452 // 64-bit addm sub, shl, sra, srl (iff 32-bit x86)
687 setOperationAction(ISD::SUB , (MVT::SimpleValueType)VT, Expand);
[all...] |
| X86ISelDAGToDAG.cpp | 311 case X86ISD::SUB:
858 case ISD::SUB: {
863 // other uses, since it avoids a two-address sub instruction, however
870 // Test if the LHS of the sub can be folded.
[all...] |
| X86ISelLowering.h | 191 /// FHSUB - Floating point horizontal sub.
234 // ADD, SUB, SMUL, etc. - Arithmetic operations with FLAGS results.
235 ADD, SUB, ADC, SBB, SMUL,
647 /// register EAX to i16 by referencing its sub-register AX.
[all...] |
| /external/libxaac/decoder/armv7/ |
| ixheaacd_esbr_qmfsyn64_winadd.s | 126 SUB R6, R6, #8
|
| /external/libxaac/decoder/armv8/ |
| ixheaacd_sbr_qmfsyn64_winadd.s | 197 SUB x6, x6, #2
|
| /external/llvm/test/MC/AArch64/ |
| arm64-aliases.s | 110 ; SUB/SUBS from WZR/XZR is a NEG
|
| /external/mesa3d/src/gallium/drivers/vc4/ |
| vc4_qir.h | 724 QIR_ALU2(SUB)
|
| vc4_qpu_emit.c | 267 A(SUB),
|
| /external/pcre/dist2/src/sljit/ |
| sljitNativeARM_64.c | 128 #define SUB 0xcb000000
745 return push_inst(compiler, (SUB ^ inv_bits) | RD(dst) | RN(TMP_ZERO) | RM(arg2));
757 return push_inst(compiler, (SUB ^ inv_bits) | RD(dst) | RN(arg1) | RM(arg2));
[all...] |
| sljitNativeARM_32.c | 109 #define SUB 0xe0400000
[all...] |
| sljitNativeTILEGX_64.c | 394 #define SUB(dst, srca, srcb) \
[all...] |
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| SelectionDAGBuilder.h | 480 void visitSub(const User &I) { visitBinary(I, ISD::SUB); }
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelDAGToDAG.cpp | 435 unsigned Sub = AMDGPURegisterInfo::getSubRegFromChannel(i);
437 RegSeqArgs[1 + (2 * i) + 1] = CurDAG->getTargetConstant(Sub, DL, MVT::i32);
445 unsigned Sub = AMDGPURegisterInfo::getSubRegFromChannel(i);
448 CurDAG->getTargetConstant(Sub, DL, MVT::i32);
851 } else if (Addr.getOpcode() == ISD::SUB) {
852 // sub C, x -> add (sub 0, x), C
858 // XXX - This is kind of hacky. Create a dummy sub node so we can check
861 SDValue Sub = CurDAG->getNode(ISD::SUB, DL, MVT::i32
[all...] |
| AMDGPUTargetTransformInfo.cpp | 368 case ISD::SUB:
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| arm64-aliases.s | 110 ; SUB/SUBS from WZR/XZR is a NEG
|
| /external/bcc/src/lua/bpf/ |
| cdef.lua | 42 static const int SUB = 0x10;
208 ctname = string.sub(ctname, -1)
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | 290 // Add/Sub overflow ops with MVT::Glues are lowered to EFLAGS dependences.
423 // 64-bit addm sub, shl, sra, srl (iff 32-bit x86)
[all...] |
| /external/v8/src/mips/ |
| constants-mips.h | 527 SUB = ((4U << 3) + 2),
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| AArch64ISelLowering.cpp | 270 // Add/Sub overflow ops with MVT::Glues are lowered to NZCV dependences.
308 // Custom lower Add/Sub/Mul with overflow.
549 // Vector add and sub nodes may conceal a high-half opportunity.
552 setTargetDAGCombine(ISD::SUB);
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEISelLowering.cpp | 70 setOperationAction(ISD::SUB, VecTys[i], Legal);
271 setOperationAction(ISD::SUB, Ty, Legal);
828 // return (sub constMult(x, ceil_c), constMult(x, ceil_c - c)).
831 return DAG.getNode(ISD::SUB, DL, VT, Op0, Op1);
[all...] |
