/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.h | 112 return SP::I0;
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SparcISelLowering.cpp | 57 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 85 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 118 // Promote integers to %i0-%i5. 119 Reg = SP::I0 + Offset/8; 163 // Promote integers to %i0-%i5, using half the register. 164 unsigned Reg = SP::I0 + Offset/8; 187 static_assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7, 189 if (Reg >= SP::I0 && Reg <= SP::I7) 190 return Reg - SP::I0 + SP::O0; 264 // If the function returns a struct, copy the SRetReturnReg to I0 [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
SparcISelLowering.h | 112 return SP::I0;
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SparcISelLowering.cpp | 59 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 87 SP::I0, SP::I1, SP::I2, SP::I3, SP::I4, SP::I5 120 // Promote integers to %i0-%i5. 121 Reg = SP::I0 + Offset/8; 165 // Promote integers to %i0-%i5, using half the register. 166 unsigned Reg = SP::I0 + Offset/8; 189 static_assert(SP::I0 + 7 == SP::I7 && SP::O0 + 7 == SP::O7, 191 if (Reg >= SP::I0 && Reg <= SP::I7) 192 return Reg - SP::I0 + SP::O0; 266 // If the function returns a struct, copy the SRetReturnReg to I0 [all...] |
/external/webp/src/dsp/ |
enc_mips_dsp_r2.c | 29 I0, I1, I2, I3, I4, I5, I6, I7) \ 30 "addq.ph %[" #O0 "], %[" #I0 "], %[" #I1 "] \n\t" \ 31 "subq.ph %[" #O1 "], %[" #I0 "], %[" #I1 "] \n\t" \ 56 #define MUL_HALF(O0, I0, I1, I2, I3, I4, I5, I6, I7, \ 59 "dpa.w.ph $ac0, %[" #I2 "], %[" #I0 "] \n\t" \ [all...] |
/external/llvm/lib/Transforms/Vectorize/ |
SLPVectorizer.cpp | 116 Instruction *I0 = dyn_cast<Instruction>(VL[0]); 117 if (!I0) 119 BasicBlock *BB = I0->getParent(); 176 Instruction *I0 = dyn_cast<Instruction>(VL[0]); 177 unsigned Opcode = I0->getOpcode(); 190 Instruction *I0 = dyn_cast<Instruction>(VL[0]); 191 if (!I0) 193 unsigned Opcode = I0->getOpcode(); [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUPromoteAlloca.cpp | 365 ConstantInt *I0 = dyn_cast<ConstantInt>(GEP->getOperand(1)); 366 if (!I0 || !I0->isZero())
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
AMDGPUPromoteAlloca.cpp | 312 ConstantInt *I0 = dyn_cast<ConstantInt>(GEP->getOperand(1)); 313 if (!I0 || !I0->isZero())
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/external/llvm/lib/Target/Sparc/AsmParser/ |
SparcAsmParser.cpp | 108 Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3, 379 else if (Reg >= Sparc::I0 && Reg <= Sparc::I7) 380 regIdx = Reg - Sparc::I0 + 24; [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/AsmParser/ |
SparcAsmParser.cpp | 133 Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3, 407 else if (Reg >= Sparc::I0 && Reg <= Sparc::I7) 408 regIdx = Reg - Sparc::I0 + 24; [all...] |
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
TestUtil.h | 241 Dqword(typename std::enable_if<std::is_same<T, int32_t>::value, T>::type I0, 243 I32[0] = I0; [all...] |
/device/linaro/bootloader/edk2/AppPkg/Applications/Python/Python-2.7.2/Lib/test/ |
test_builtin.py | [all...] |
/external/python/cpython2/Lib/test/ |
test_builtin.py | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/TableGen/ |
Record.cpp | 830 static StringInit *ConcatStringInits(const StringInit *I0, 832 SmallString<80> Concat(I0->getValue()); 837 Init *BinOpInit::getStrConcat(Init *I0, Init *I1) { 839 if (const StringInit *I0s = dyn_cast<StringInit>(I0)) 842 return BinOpInit::get(BinOpInit::STRCONCAT, I0, I1, StringRecTy::get()); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Analysis/ |
ScalarEvolutionTest.cpp | 528 auto &I0 = GetInstByName(F, "iv0"); 529 auto &I1 = *I0.getNextNode(); 531 auto *S0 = cast<SCEVAddRecExpr>(SE.getSCEV(&I0)); [all...] |
/external/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMELFStreamer.cpp | 488 const unsigned I0 = LittleEndian ? II + 0 : (Size - II - 1); 490 Buffer[Size - II - 2] = uint8_t(Inst >> I0 * CHAR_BIT); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/MCTargetDesc/ |
ARMELFStreamer.cpp | 519 const unsigned I0 = LittleEndian ? II + 0 : II + 1; 521 Buffer[Size - II - 2] = uint8_t(Inst >> I0 * CHAR_BIT); [all...] |
/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
TestUtil.h | 353 Dqword(typename std::enable_if<std::is_same<T, int32_t>::value, T>::type I0, 355 I32[0] = I0; [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Vectorize/ |
SLPVectorizer.cpp | 179 Instruction *I0 = dyn_cast<Instruction>(VL[0]); 180 if (!I0) 182 BasicBlock *BB = I0->getParent(); [all...] |
/external/ImageMagick/MagickCore/ |
resize.c | 115 I0(double x), 373 I0( beta * sqrt( 1-x^2) ) / IO(0) 382 return(resize_filter->coefficient[1]*I0(resize_filter->coefficient[0]* [all...] |
/external/llvm/lib/Target/Sparc/Disassembler/ |
SparcDisassembler.cpp | 74 SP::I0, SP::I1, SP::I2, SP::I3,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/Disassembler/ |
SparcDisassembler.cpp | 76 SP::I0, SP::I1, SP::I2, SP::I3,
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/external/webrtc/data/voice_engine/stereo_rtp_files/ |
stereo_g729_jitter.rtp | 201 ??m?3?????sDip_?k < |