/external/llvm/lib/Transforms/IPO/ |
PruneEH.cpp | 143 if (const auto *IA = dyn_cast<InlineAsm>(ICS.getCalledValue())) 144 if (IA->hasSideEffects())
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/IPO/ |
PruneEH.cpp | 139 if (const auto *IA = dyn_cast<InlineAsm>(ICS.getCalledValue())) 140 if (IA->hasSideEffects())
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Analysis/ |
TypeBasedAliasAnalysis.cpp | 506 int IA = PathA.size() - 1; 510 while (IA >= 0 && IB >= 0) { 511 if (PathA[IA] == PathB[IB]) 512 Ret = PathA[IA]; 515 --IA;
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/MC/ |
MCCodeView.cpp | 284 MCCVFunctionInfo::LineInfo &IA = I->second; 289 FilteredLines.back().getFileNum() != IA.File || 290 FilteredLines.back().getLine() != IA.Line || 291 FilteredLines.back().getColumn() != IA.Col) { 294 MCCVLoc(FuncId, IA.File, IA.Line, IA.Col, false, false)));
|
/external/swiftshader/third_party/LLVM/lib/Bitcode/Writer/ |
ValueEnumerator.cpp | 98 MDNode *Scope, *IA; 99 I->getDebugLoc().getScopeAndInlinedAt(Scope, IA, I->getContext()); 101 if (IA) EnumerateMetadata(IA);
|
BitcodeWriter.cpp | 768 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) { 769 Record.push_back(unsigned(IA->hasSideEffects()) | 770 unsigned(IA->isAlignStack()) << 1); 773 const std::string &AsmStr = IA->getAsmString(); 779 const std::string &ConstraintStr = IA->getConstraintString(); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
RDFLiveness.h | 82 NodeAddr<InstrNode*> IA);
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
PPCCTRLoops.cpp | 248 static bool asmClobbersCTR(InlineAsm *IA) { 249 InlineAsm::ConstraintInfoVector CIV = IA->ParseConstraints(); 265 if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) { 266 if (asmClobbersCTR(IA))
|
/device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EfiCommonLib/Ia32/ |
DivU64x32.asm | 19 ; 64-bit division function for IA-32
|
/external/libunwind/doc/ |
unw_getcontext.tex | 31 On IA-64, \Type{unw\_context\_t} has a layout that is compatible with
|
unw_get_fpreg.tex | 24 manual pages (e.g., libunwind-ia64(3) for the IA-64 target).
|
unw_get_reg.tex | 24 manual pages (e.g., libunwind-ia64(3) for the IA-64 target).
|
unw_set_fpreg.tex | 24 manual pages (e.g., libunwind-ia64(3) for the IA-64 target).
|
unw_set_reg.tex | 24 manual pages (e.g., libunwind-ia64(3) for the IA-64 target).
|
/external/llvm/lib/CodeGen/AsmPrinter/ |
DwarfCompileUnit.cpp | 452 const DILocation *IA = Scope->getInlinedAt(); 454 getOrCreateSourceID(IA->getFilename(), IA->getDirectory())); 455 addUInt(*ScopeDIE, dwarf::DW_AT_call_line, None, IA->getLine()); 456 if (IA->getDiscriminator()) 458 IA->getDiscriminator()); [all...] |
/external/llvm/lib/Transforms/Utils/ |
ValueMapper.cpp | 364 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) { 366 FunctionType *NewTy = IA->getFunctionType(); 370 if (NewTy != IA->getFunctionType()) 371 V = InlineAsm::get(NewTy, IA->getAsmString(), IA->getConstraintString(), 372 IA->hasSideEffects(), IA->isAlignStack()); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
ValueMapper.cpp | 365 if (const InlineAsm *IA = dyn_cast<InlineAsm>(V)) { 367 FunctionType *NewTy = IA->getFunctionType(); 371 if (NewTy != IA->getFunctionType()) 372 V = InlineAsm::get(NewTy, IA->getAsmString(), IA->getConstraintString(), 373 IA->hasSideEffects(), IA->isAlignStack()); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/AsmPrinter/ |
DwarfCompileUnit.cpp | 472 const DILocation *IA = Scope->getInlinedAt(); 474 getOrCreateSourceID(IA->getFile())); 475 addUInt(*ScopeDIE, dwarf::DW_AT_call_line, None, IA->getLine()); 476 if (IA->getDiscriminator() && DD->getDwarfVersion() >= 4) 478 IA->getDiscriminator()); 858 auto AbsDbgVariable = llvm::make_unique<DbgVariable>(Var, /* IA */ nullptr); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
GCNHazardRecognizer.cpp | 575 int GCNHazardRecognizer::checkInlineAsmHazards(MachineInstr *IA) { 590 for (unsigned I = InlineAsm::MIOp_FirstOperand, E = IA->getNumOperands(); 592 const MachineOperand &Op = IA->getOperand(I);
|
/external/llvm/lib/Target/Mips/ |
Mips16HardFloat.cpp | 49 llvm::InlineAsm *IA = 52 CallInst::Create(IA, AsmArgs, "", BB);
|
/external/llvm/lib/Transforms/ObjCARC/ |
ObjCARCContract.cpp | 454 InlineAsm *IA = InlineAsm::get( 459 CallInst::Create(IA, "", Inst);
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
Mips16HardFloat.cpp | 53 InlineAsm *IA = InlineAsm::get(AsmFTy, AsmText, "", true, 55 CallInst::Create(IA, AsmArgs, "", BB);
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
ADCE.cpp | 439 if (const DILocation *IA = DL.getInlinedAt()) 440 collectLiveScopes(*IA);
|
/external/swiftshader/third_party/LLVM/lib/VMCore/ |
LLVMContextImpl.h | 230 int getOrAddScopeInlinedAtIdxEntry(MDNode *Scope, MDNode *IA,int ExistingIdx);
|
/art/runtime/mirror/ |
object_test.cc | 654 Handle<Class> IA = hs.NewHandle(class_linker_->FindSystemClass(soa.Self(), "[I")); 655 ASSERT_TRUE(IA != nullptr); 669 EXPECT_FALSE(IA->IsAssignableFrom(OA.Get())); 670 EXPECT_FALSE(OA->IsAssignableFrom(IA.Get())); 671 EXPECT_TRUE(O->IsAssignableFrom(IA.Get())); [all...] |