/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
X86ISelLowering.h | 96 /// X86 SetCC. Operand 0 is condition code, and operand 1 is the EFLAGS 98 SETCC, 103 // Same as SETCC except it's materialized with a sbb and the value is all 107 /// X86 FP SETCC, implemented with CMP{cc}SS/CMP{cc}SD. 112 /// X86 FP SETCC, similar to above, but with output as an i1 mask and 848 /// Return the value type to use for ISD::SETCC. [all...] |
X86ISelDAGToDAG.cpp | 473 if (Opcode == X86ISD::CMPM || Opcode == ISD::SETCC || [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeFloatTypes.cpp | [all...] |
SelectionDAG.cpp | 277 default: llvm_unreachable("Illegal integer setcc operation!"); 294 // Cannot fold a signed integer setcc with an unsigned integer setcc. 304 // Canonicalize illegal integer setcc's. 314 // Cannot fold a signed setcc with an unsigned setcc. 320 // Canonicalize illegal integer setcc's. [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeFloatTypes.cpp | [all...] |
LegalizeIntegerTypes.cpp | 79 case ISD::SETCC: Res = PromoteIntRes_SETCC(N); break; 613 // Get the SETCC result using the canonical SETCC type. 614 SDValue SetCC = DAG.getNode(N->getOpcode(), dl, SVT, N->getOperand(0), 618 return DAG.getSExtOrTrunc(SetCC, dl, NVT); [all...] |
SelectionDAG.cpp | 360 default: llvm_unreachable("Illegal integer setcc operation!"); 377 // Cannot fold a signed integer setcc with an unsigned integer setcc. 387 // Canonicalize illegal integer setcc's. 397 // Cannot fold a signed setcc with an unsigned setcc. 403 // Canonicalize illegal integer setcc's. [all...] |
/external/llvm/include/llvm/CodeGen/ |
SelectionDAG.h | [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelDAGToDAG.cpp | 49 return Cond.getOpcode() == ISD::SETCC && [all...] |
AMDGPUISelLowering.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
AlphaISelLowering.cpp | 129 setOperationAction(ISD::SETCC, MVT::f32, Promote); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
SelectionDAG.h | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
AMDGPUISelLowering.cpp | 437 setOperationAction(ISD::SETCC, VT, Expand); 472 setOperationAction(ISD::SETCC, VT, Expand); [all...] |
AMDGPUISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 249 // PowerPC wants to optimize integer setcc a bit 251 setOperationAction(ISD::SETCC, MVT::i32, Custom); 253 // PowerPC does not have BRCOND which requires SetCC 623 setOperationAction(ISD::SETCC, MVT::v2i64, Legal); 630 setOperationAction(ISD::SETCC, MVT::v2i64, Custom); [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
ARMISelLowering.cpp | 110 setOperationAction(ISD::SETCC, VT.getSimpleVT(), Custom); 466 setOperationAction(ISD::SETCC, MVT::v2f64, Expand); 498 setOperationAction(ISD::SETCC, MVT::v1i64, Expand); 499 setOperationAction(ISD::SETCC, MVT::v2i64, Expand); 683 setOperationAction(ISD::SETCC, MVT::i32, Expand); 684 setOperationAction(ISD::SETCC, MVT::f32, Expand); 685 setOperationAction(ISD::SETCC, MVT::f64, Expand); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 161 setOperationAction(ISD::SETCC, VT, Custom); 584 // FIXME: Code duplication: SETCC has custom operation action, see 586 setOperationAction(ISD::SETCC, MVT::v2f64, Expand); [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 360 // PowerPC wants to optimize integer setcc a bit 362 setOperationAction(ISD::SETCC, MVT::i32, Custom); 364 // PowerPC does not have BRCOND which requires SetCC 769 setOperationAction(ISD::SETCC, MVT::v2i64, Legal); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | 100 setOperationAction(ISD::SETCC, VT, Custom); 493 // FIXME: Code duplication: SETCC has custom operation action, see 495 setOperationAction(ISD::SETCC, MVT::v2f64, Expand); 561 setOperationAction(ISD::SETCC, MVT::v1i64, Expand); 562 setOperationAction(ISD::SETCC, MVT::v2i64, Expand); [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
SelectionDAG.cpp | 224 /// 'op' is a valid SetCC operation. 244 default: llvm_unreachable("Illegal integer setcc operation!"); 265 // Cannot fold a signed integer setcc with an unsigned integer setcc. 275 // Canonicalize illegal integer setcc's. 289 // Cannot fold a signed setcc with an unsigned setcc. 295 // Canonicalize illegal integer setcc's. [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
XCoreISelLowering.cpp | 82 // Use i32 for setcc operations results (slt, sgt, ...). 217 SDValue Cond = DAG.getNode(ISD::SETCC, dl, MVT::i32, Op.getOperand(2), [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
RISCVISelLowering.cpp | 231 // Changes the condition code and swaps operands if necessary, so the SetCC 387 // If the result type is XLenVT and CondV is the output of a SETCC node 388 // which also operated on XLenVT inputs, then merge the SETCC node into the 391 // (select (setcc lhs, rhs, cc), truev, falsev) 393 if (Op.getSimpleValueType() == XLenVT && CondV.getOpcode() == ISD::SETCC && [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 135 setOperationAction(ISD::SETCC, VT, Custom); 363 setOperationAction(ISD::SETCC, VT, Custom); [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 138 setOperationAction(ISD::SETCC, VT, Custom); 338 setOperationAction(ISD::SETCC, VT, Custom); [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 168 // PowerPC wants to optimize integer setcc a bit 169 setOperationAction(ISD::SETCC, MVT::i32, Custom); 171 // PowerPC does not have BRCOND which requires SetCC [all...] |