| /external/boringssl/linux-arm/crypto/fipsmodule/ |
| ghashv8-armx32.S | 119 vstmdb sp!,{d8,d9,d10,d11,d12,d13,d14,d15} @ 32-bit ABI says so
244 vldmia sp!,{d8,d9,d10,d11,d12,d13,d14,d15} @ 32-bit ABI says so
|
| /external/libhevc/common/arm64/ |
| ihevc_intra_pred_chroma_planar.s | 111 stp d12,d13,[sp,#-16]!
359 // vmovn.i16 d12, q6
375 ldp d12,d13,[sp],#16
|
| ihevc_deblk_luma_horz.s | 56 stp d12,d13,[sp,#-16]!
433 ldp d12,d13,[sp],#16
526 // d12 and d13 have the value temp_p0 and temp_q0
583 ldp d12,d13,[sp],#16
|
| ihevc_deblk_luma_vert.s | 58 stp d12,d13,[sp,#-16]!
450 ldp d12,d13,[sp],#16
630 ldp d12,d13,[sp],#16
|
| ihevc_intra_pred_chroma_mode2.s | 262 shl d0, d12,#32
|
| ihevc_inter_pred_chroma_horz.s | 110 stp d11,d12,[sp,#-16]!
498 //vext.u8 d14,d12,d13,#2 //vector extract of src[0_2]
501 //vext.u8 d16,d12,d13,#4 //vector extract of src[0_4]
502 //vext.u8 d18,d12,d13,#6 //vector extract of src[0_6]
730 //vext.u8 d14,d12,d13,#2 //vector extract of src[0_2]
731 //vext.u8 d16,d12,d13,#4 //vector extract of src[0_4]
732 //vext.u8 d18,d12,d13,#6 //vector extract of src[0_6]
770 ldp d11,d12,[sp],#16
|
| ihevc_inter_pred_chroma_horz_w16out.s | 109 stp d12,d13,[sp,#-16]!
481 //vext.u8 d14,d12,d13,#2 //vector extract of src[0_2]
484 //vext.u8 d16,d12,d13,#4 //vector extract of src[0_4]
485 //vext.u8 d18,d12,d13,#6 //vector extract of src[0_6]
701 //vext.u8 d14,d12,d13,#2 //vector extract of src[0_2]
702 //vext.u8 d16,d12,d13,#4 //vector extract of src[0_4]
703 //vext.u8 d18,d12,d13,#6 //vector extract of src[0_6]
795 ldp d12,d13,[sp],#16
|
| ihevc_intra_pred_chroma_mode_27_to_33.s | 100 stp d12,d13,[sp,#-16]!
550 ldp d12,d13,[sp],#16
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| invalid-neon-v8.s | 19 vrinta.f64.f64 s3, d12
|
| neon-add-encoding.s | 70 vhadd.s16 d12, d23
83 @ CHECK: vhadd.s16 d12, d12, d23 @ encoding: [0x27,0xc0,0x1c,0xf2]
|
| /external/vixl/test/aarch64/ |
| test-api-aarch64.cc | 244 VIXL_CHECK(!AreConsecutive(d12, d12));
|
| /external/capstone/suite/MC/ARM/ |
| neon-add-encoding.s.cs | 33 0x27,0xc0,0x1c,0xf2 = vhadd.s16 d12, d12, d23 package
|
| /external/libavc/encoder/armv8/ |
| ime_distortion_metrics_av8.s | 85 stp d12, d13, [sp, #-16]!
90 ldp d12, d13, [sp], #16
805 stp d12, d13, [sp, #-16]!
989 ldp d12, d13, [sp], #16
|
| /external/python/cpython2/Lib/test/ |
| test_grammar.py | 253 def d12(a, b=1, c=2): pass function in function:GrammarTests.test_funcdef
254 d12(1)
255 d12(1, 2)
256 d12(1, 2, 3)
[all...] |
| /external/libhevc/common/arm/ |
| ihevc_deblk_luma_horz.s | 478 vqmovun.s16 d12,q2
497 @ d12 and d13 have the value temp_p0 and temp_q0
520 vbsl d19,d25,d12
|
| /external/llvm/test/MC/AArch64/ |
| neon-diagnostics.s | [all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| neon-diagnostics.s | [all...] |
| /art/runtime/arch/arm64/ |
| quick_entrypoints_arm64.S | 105 stp d12, d13, [sp, #48]
298 stp d12, d13, [sp, #112]
357 ldp d12, d13, [sp, #112]
1003 stp d12, d13, [sp, #144]
[all...] |
| /external/llvm/test/MC/ARM/ |
| neon-add-encoding.s | 70 vhadd.s16 d12, d23
83 @ CHECK: vhadd.s16 d12, d12, d23 @ encoding: [0x27,0xc0,0x1c,0xf2]
|
| /external/boringssl/ios-arm/crypto/fipsmodule/ |
| aesv8-armx32.S | 316 vstmdb sp!,{d8,d9,d10,d11,d12,d13,d14,d15} @ ABI specification says so
599 vldmia sp!,{d8,d9,d10,d11,d12,d13,d14,d15}
611 vstmdb sp!,{d8,d9,d10,d11,d12,d13,d14,d15} @ ABI specification says so
785 vldmia sp!,{d8,d9,d10,d11,d12,d13,d14,d15}
|
| /external/google-breakpad/src/common/android/ |
| breakpad_getcontext.S | 145 stp d12, d13, [x3], #(2 * SIMD_REGISTER_SIZE)
|
| /external/python/cpython3/Lib/test/ |
| test_grammar.py | 495 def d12(a, b=1, c=2): pass function in function:GrammarTests.test_funcdef
496 d12(1)
497 d12(1, 2)
498 d12(1, 2, 3)
[all...] |
| /external/v8/src/arm/ |
| simulator-arm.h | 78 d8, d9, d10, d11, d12, d13, d14, d15, enumerator in enum:v8::internal::Simulator::Register
|
| /external/v8/src/ppc/ |
| simulator-ppc.h | 104 d12, enumerator in enum:v8::internal::Simulator::Register
|
| /external/libavc/common/arm/ |
| ih264_inter_pred_luma_vert_qpel_a9q.s | 256 vld1.32 d12, [r7], r2 @Load value for interpolation (row2)
310 vld1.u32 d12[0], [r7], r2 @Load value for interpolation - row 2
|
