/external/llvm/test/tools/llvm-readobj/ARM/ |
unwind.s | 269 @ CHECK: 0xC8 0x02 ; pop {d16, d17, d18}
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/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-readobj/ARM/ |
unwind.s | 269 @ CHECK: 0xC8 0x02 ; pop {d16, d17, d18}
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/external/v8/src/arm/ |
simulator-arm.h | 79 d16, d17, d18, d19, d20, d21, d22, d23, enumerator in enum:v8::internal::Simulator::Register
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assembler-arm.h | 74 V(d16) V(d17) V(d18) V(d19) V(d20) V(d21) V(d22) V(d23) \ 87 V(d16) V(d17) V(d18) V(d19) V(d20) V(d21) V(d22) V(d23) \ [all...] |
/external/v8/src/ppc/ |
simulator-ppc.h | 109 d17, enumerator in enum:v8::internal::Simulator::Register
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assembler-ppc.h | 112 V(d16) V(d17) V(d18) V(d19) V(d20) V(d21) V(d22) V(d23) \ 124 V(d16) V(d17) V(d18) V(d19) V(d20) V(d21) V(d22) V(d23) \ 195 1 << 17 | // d17 [all...] |
/external/libavc/common/arm/ |
ih264_intra_pred_luma_4x4_a9q.s | 741 vext.8 d17, d5, d5, #2 744 vst1.32 {d17[0]}, [r1], r3
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ih264_deblk_chroma_a9.s | 322 vst2.8 {d16, d17}, [r6], r1 @ 725 vdup.8 d17, r6 @D17 contains beta_cr [all...] |
ih264_inter_pred_luma_horz_hpel_vert_qpel_a9q.s | 249 vaddl.s16 q3, d7, d17 479 vaddl.s16 q3, d7, d17 711 vaddl.s16 q3, d7, d17
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ih264_weighted_bi_pred_a9q.s | 306 vmovl.u8 q8, d17 @converting row 4H in source 1 to 16-bit 583 vmovl.u8 q8, d17 @converting row 3H in source 1 to 16-bit
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/external/libhevc/common/arm/ |
ihevc_deblk_luma_vert.s | 508 vmin.s8 d17,d16,d18 509 vmax.s8 d16,d19,d17
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ihevc_resi_trans.s | 154 VSWP d17, d18 @ 4th step of the 4-step matrix transpose 306 VSWP d17,d20 @ Residue block transposed 459 VLD2.8 {d15,d17},[r0] @ Row 8 of source in d15 529 VADD.U16 d16,d16,d17 @ SAD calculation (3) 637 VST1.64 {d16,d17},[r2],r4 @ Row 2 of transform stage 1 F1[1] stored 657 VSWP d26,d17 @ Transposing first half of transform stage 1 (4b) [all...] |
ihevc_itrans_recon_32x32.s | [all...] |
/external/libxaac/decoder/armv7/ |
ixheaacd_fft32x32_ld.s | 445 VSWP d22, d17 753 VMLSL.S16 q13, d17, d3 @a_data2_r=vmlsl_s16(a_data2_r, a_data2.val[3], sin_2)@ 756 VMLAL.S16 q14, d17, d2 @a_data2_i=vmlal_s16(a_data2_i, a_data2.val[3], cos_2)@
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/external/boringssl/ios-aarch64/crypto/test/ |
trampoline-armv8.S | 505 fmov d17, xzr
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/external/elfutils/tests/ |
run-strings-test.sh | 130 testfile4: d17 __frame_state_for
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run-readelf-mixed-corenote.sh | 78 d16: 0x0000000000000000 d17: 0x0000000000000000
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/external/vixl/test/aarch64/ |
test-assembler-aarch64.cc | [all...] |
test-trace-aarch64.cc | 425 __ fcmle(d24, d17, 0.0); 433 __ fcmpe(d9, d17); 473 __ fcvtns(x8, d17); 542 __ fmulx(d4, d17, d1); 554 __ frecps(d11, d26, d17); 574 __ frsqrts(d4, d29, d17); 576 __ fsqrt(d14, d17); 621 __ add(d10, d5, d17); 730 __ cmhs(d1, d12, d17); [all...] |
/external/boringssl/linux-aarch64/crypto/test/ |
trampoline-armv8.S | 506 fmov d17, xzr
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/external/libunwind_llvm/src/ |
UnwindRegistersSave.S | 738 stp d16,d17, [x0, #0x190]
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/external/llvm/test/MC/AArch64/ |
basic-a64-instructions.s | [all...] |
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
basic-a64-instructions.s | [all...] |
/art/compiler/utils/arm64/ |
managed_register_arm64_test.cc | 566 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17))); 589 EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17))); [all...] |
/external/capstone/suite/MC/AArch64/ |
basic-a64-instructions.s.cs | 724 0x30,0x42,0x65,0x1e = frintm d16, d17 740 0x74,0x0a,0x71,0x1e = fmul d20, d19, d17 746 0x30,0x6a,0x72,0x1e = fmaxnm d16, d17, d18 package [all...] |