| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 393 unsigned SrcReg, bool isKill, int FI,
408 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
411 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
414 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
417 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
420 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
425 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 397 unsigned SrcReg, bool isKill, int FI,
412 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
415 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
418 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
421 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
424 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
429 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | 797 bool isKill() const { return getOpcode() == TargetOpcode::KILL; }
[all...] |
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| MachineInstr.h | [all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 39 unsigned SrcReg, bool isKill, int FrameIdx,
55 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
59 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 37 unsigned SrcReg, bool isKill, int FrameIdx,
55 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
59 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
| MSP430InstrInfo.cpp | 39 unsigned SrcReg, bool isKill, int FrameIdx,
55 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
59 .addReg(SrcReg, getKillRegState(isKill)).addMemOperand(MMO);
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.h | 52 unsigned SrcReg, bool isKill, int FrameIndex,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCQPXLoadSplat.cpp | 158 if (!MI->getOperand(1).isKill())
|
| PPCInstrInfo.h | 72 unsigned SrcReg, bool isKill, int FrameIdx,
190 unsigned SrcReg, bool isKill, int FrameIndex,
|
| /external/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 78 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill()))
114 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill()))
148 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill()))
191 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill()))
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| MachineOperand.h | 67 /// IsDef/IsImp/IsKill/IsDead flags - These are only valid for MO_Register
78 /// IsKill - True if this instruction is the last use of the register on this
80 bool IsKill : 1;
251 bool isKill() const {
253 return IsKill;
333 IsKill = Val;
452 /// operand. Note: This method ignores isKill and isDead properties.
464 bool isKill = false, bool isDead = false,
490 bool isKill = false, bool isDead = false,
498 Op.IsKill = isKill
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| Thumb1FrameLowering.cpp | 306 bool isKill = true;
315 isKill = false;
318 if (isKill)
321 MIB.addReg(Reg, getKillRegState(isKill));
|
| ARMLoadStoreOptimizer.cpp | 79 bool isKill;
85 : Offset(o), Reg(r), isKill(k), Position(p), MBBI(i), Merged(false) {}
388 if (memOps[i].Position < insertPos && memOps[i].isKill) {
400 bool isKill = memOps[i].isKill || KilledRegs.count(Reg);
401 Regs.push_back(std::make_pair(Reg, isKill));
422 memOps[j].isKill = false;
424 memOps[i].isKill = true;
686 bool BaseKill = MI->getOperand(0).isKill();
824 bool BaseKill = MI->getOperand(1).isKill();
[all...] |
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| AlphaInstrInfo.cpp | 145 unsigned SrcReg, bool isKill, int FrameIdx,
157 .addReg(SrcReg, getKillRegState(isKill))
161 .addReg(SrcReg, getKillRegState(isKill))
165 .addReg(SrcReg, getKillRegState(isKill))
|
| /external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
| PTXInstrInfo.h | 104 unsigned SrcReg, bool isKill, int FrameIndex,
|
| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 288 unsigned SrcReg, bool isKill, int FI,
297 .addReg(SrcReg, getKillRegState(isKill));
300 .addReg(SrcReg, getKillRegState(isKill));
303 .addReg(SrcReg, getKillRegState(isKill));
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.h | 61 unsigned SrcReg, bool isKill, int FrameIndex,
|
| MipsSEInstrInfo.h | 55 unsigned SrcReg, bool isKill, int FrameIndex,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| PPCQPXLoadSplat.cpp | 158 if (!MI->getOperand(1).isKill())
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| XCoreRegisterInfo.cpp | 78 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill()))
114 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill()))
148 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill()))
191 .addReg(Reg, getKillRegState(MI.getOperand(0).isKill()))
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| MachineInstr.cpp | 156 bool isKill, bool isDead, bool isUndef,
178 IsKill = isKill;
242 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() ||
259 if (isKill() || isDead() || isUndef()) {
261 if (isKill()) OS << "kill";
264 if (isKill() || isDead())
776 if (Check == CheckKillDead && MO.isKill() != OMO.isKill())
892 /// the search criteria to a use that kills the register if isKill is true
[all...] |
| ExpandPostRAPseudos.cpp | 137 MI->getOperand(2).isKill());
174 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill());
|
| /external/llvm/lib/CodeGen/ |
| ExpandPostRAPseudos.cpp | 123 MI->getOperand(2).isKill());
167 DstMO.getReg(), SrcMO.getReg(), SrcMO.isKill());
|
| /external/llvm/lib/Target/X86/ |
| X86InstrBuilder.h | 137 unsigned Reg, bool isKill, int Offset) {
138 return addOffset(MIB.addReg(Reg, getKillRegState(isKill)), Offset);
|
