1 /* 2 * Copyright (C) 2011 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef ART_LIBARTBASE_ARCH_INSTRUCTION_SET_H_ 18 #define ART_LIBARTBASE_ARCH_INSTRUCTION_SET_H_ 19 20 #include <iosfwd> 21 #include <string> 22 23 #include "base/enums.h" 24 #include "base/macros.h" 25 26 namespace art { 27 28 enum class InstructionSet { 29 kNone, 30 kArm, 31 kArm64, 32 kThumb2, 33 kX86, 34 kX86_64, 35 kMips, 36 kMips64, 37 kLast = kMips64 38 }; 39 std::ostream& operator<<(std::ostream& os, const InstructionSet& rhs); 40 41 #if defined(__arm__) 42 static constexpr InstructionSet kRuntimeISA = InstructionSet::kArm; 43 #elif defined(__aarch64__) 44 static constexpr InstructionSet kRuntimeISA = InstructionSet::kArm64; 45 #elif defined(__mips__) && !defined(__LP64__) 46 static constexpr InstructionSet kRuntimeISA = InstructionSet::kMips; 47 #elif defined(__mips__) && defined(__LP64__) 48 static constexpr InstructionSet kRuntimeISA = InstructionSet::kMips64; 49 #elif defined(__i386__) 50 static constexpr InstructionSet kRuntimeISA = InstructionSet::kX86; 51 #elif defined(__x86_64__) 52 static constexpr InstructionSet kRuntimeISA = InstructionSet::kX86_64; 53 #else 54 static constexpr InstructionSet kRuntimeISA = InstructionSet::kNone; 55 #endif 56 57 // Architecture-specific pointer sizes 58 static constexpr PointerSize kArmPointerSize = PointerSize::k32; 59 static constexpr PointerSize kArm64PointerSize = PointerSize::k64; 60 static constexpr PointerSize kMipsPointerSize = PointerSize::k32; 61 static constexpr PointerSize kMips64PointerSize = PointerSize::k64; 62 static constexpr PointerSize kX86PointerSize = PointerSize::k32; 63 static constexpr PointerSize kX86_64PointerSize = PointerSize::k64; 64 65 // ARM instruction alignment. ARM processors require code to be 4-byte aligned, 66 // but ARM ELF requires 8.. 67 static constexpr size_t kArmAlignment = 8; 68 69 // ARM64 instruction alignment. This is the recommended alignment for maximum performance. 70 static constexpr size_t kArm64Alignment = 16; 71 72 // MIPS instruction alignment. MIPS processors require code to be 4-byte aligned, 73 // but 64-bit literals must be 8-byte aligned. 74 static constexpr size_t kMipsAlignment = 8; 75 76 // X86 instruction alignment. This is the recommended alignment for maximum performance. 77 static constexpr size_t kX86Alignment = 16; 78 79 // Different than code alignment since code alignment is only first instruction of method. 80 static constexpr size_t kThumb2InstructionAlignment = 2; 81 static constexpr size_t kArm64InstructionAlignment = 4; 82 static constexpr size_t kX86InstructionAlignment = 1; 83 static constexpr size_t kX86_64InstructionAlignment = 1; 84 static constexpr size_t kMipsInstructionAlignment = 4; 85 static constexpr size_t kMips64InstructionAlignment = 4; 86 87 const char* GetInstructionSetString(InstructionSet isa); 88 89 // Note: Returns kNone when the string cannot be parsed to a known value. 90 InstructionSet GetInstructionSetFromString(const char* instruction_set); 91 92 // Fatal logging out of line to keep the header clean of logging.h. 93 NO_RETURN void InstructionSetAbort(InstructionSet isa); 94 95 constexpr PointerSize GetInstructionSetPointerSize(InstructionSet isa) { 96 switch (isa) { 97 case InstructionSet::kArm: 98 // Fall-through. 99 case InstructionSet::kThumb2: 100 return kArmPointerSize; 101 case InstructionSet::kArm64: 102 return kArm64PointerSize; 103 case InstructionSet::kX86: 104 return kX86PointerSize; 105 case InstructionSet::kX86_64: 106 return kX86_64PointerSize; 107 case InstructionSet::kMips: 108 return kMipsPointerSize; 109 case InstructionSet::kMips64: 110 return kMips64PointerSize; 111 112 case InstructionSet::kNone: 113 break; 114 } 115 InstructionSetAbort(isa); 116 } 117 118 constexpr size_t GetInstructionSetInstructionAlignment(InstructionSet isa) { 119 switch (isa) { 120 case InstructionSet::kArm: 121 // Fall-through. 122 case InstructionSet::kThumb2: 123 return kThumb2InstructionAlignment; 124 case InstructionSet::kArm64: 125 return kArm64InstructionAlignment; 126 case InstructionSet::kX86: 127 return kX86InstructionAlignment; 128 case InstructionSet::kX86_64: 129 return kX86_64InstructionAlignment; 130 case InstructionSet::kMips: 131 return kMipsInstructionAlignment; 132 case InstructionSet::kMips64: 133 return kMips64InstructionAlignment; 134 135 case InstructionSet::kNone: 136 break; 137 } 138 InstructionSetAbort(isa); 139 } 140 141 constexpr bool IsValidInstructionSet(InstructionSet isa) { 142 switch (isa) { 143 case InstructionSet::kArm: 144 case InstructionSet::kThumb2: 145 case InstructionSet::kArm64: 146 case InstructionSet::kX86: 147 case InstructionSet::kX86_64: 148 case InstructionSet::kMips: 149 case InstructionSet::kMips64: 150 return true; 151 152 case InstructionSet::kNone: 153 return false; 154 } 155 return false; 156 } 157 158 size_t GetInstructionSetAlignment(InstructionSet isa); 159 160 constexpr bool Is64BitInstructionSet(InstructionSet isa) { 161 switch (isa) { 162 case InstructionSet::kArm: 163 case InstructionSet::kThumb2: 164 case InstructionSet::kX86: 165 case InstructionSet::kMips: 166 return false; 167 168 case InstructionSet::kArm64: 169 case InstructionSet::kX86_64: 170 case InstructionSet::kMips64: 171 return true; 172 173 case InstructionSet::kNone: 174 break; 175 } 176 InstructionSetAbort(isa); 177 } 178 179 constexpr PointerSize InstructionSetPointerSize(InstructionSet isa) { 180 return Is64BitInstructionSet(isa) ? PointerSize::k64 : PointerSize::k32; 181 } 182 183 constexpr size_t GetBytesPerGprSpillLocation(InstructionSet isa) { 184 switch (isa) { 185 case InstructionSet::kArm: 186 // Fall-through. 187 case InstructionSet::kThumb2: 188 return 4; 189 case InstructionSet::kArm64: 190 return 8; 191 case InstructionSet::kX86: 192 return 4; 193 case InstructionSet::kX86_64: 194 return 8; 195 case InstructionSet::kMips: 196 return 4; 197 case InstructionSet::kMips64: 198 return 8; 199 200 case InstructionSet::kNone: 201 break; 202 } 203 InstructionSetAbort(isa); 204 } 205 206 constexpr size_t GetBytesPerFprSpillLocation(InstructionSet isa) { 207 switch (isa) { 208 case InstructionSet::kArm: 209 // Fall-through. 210 case InstructionSet::kThumb2: 211 return 4; 212 case InstructionSet::kArm64: 213 return 8; 214 case InstructionSet::kX86: 215 return 8; 216 case InstructionSet::kX86_64: 217 return 8; 218 case InstructionSet::kMips: 219 return 4; 220 case InstructionSet::kMips64: 221 return 8; 222 223 case InstructionSet::kNone: 224 break; 225 } 226 InstructionSetAbort(isa); 227 } 228 229 namespace instruction_set_details { 230 231 #if !defined(ART_STACK_OVERFLOW_GAP_arm) || !defined(ART_STACK_OVERFLOW_GAP_arm64) || \ 232 !defined(ART_STACK_OVERFLOW_GAP_mips) || !defined(ART_STACK_OVERFLOW_GAP_mips64) || \ 233 !defined(ART_STACK_OVERFLOW_GAP_x86) || !defined(ART_STACK_OVERFLOW_GAP_x86_64) 234 #error "Missing defines for stack overflow gap" 235 #endif 236 237 static constexpr size_t kArmStackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm; 238 static constexpr size_t kArm64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm64; 239 static constexpr size_t kMipsStackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_mips; 240 static constexpr size_t kMips64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_mips64; 241 static constexpr size_t kX86StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86; 242 static constexpr size_t kX86_64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86_64; 243 244 NO_RETURN void GetStackOverflowReservedBytesFailure(const char* error_msg); 245 246 } // namespace instruction_set_details 247 248 ALWAYS_INLINE 249 constexpr size_t GetStackOverflowReservedBytes(InstructionSet isa) { 250 switch (isa) { 251 case InstructionSet::kArm: // Intentional fall-through. 252 case InstructionSet::kThumb2: 253 return instruction_set_details::kArmStackOverflowReservedBytes; 254 255 case InstructionSet::kArm64: 256 return instruction_set_details::kArm64StackOverflowReservedBytes; 257 258 case InstructionSet::kMips: 259 return instruction_set_details::kMipsStackOverflowReservedBytes; 260 261 case InstructionSet::kMips64: 262 return instruction_set_details::kMips64StackOverflowReservedBytes; 263 264 case InstructionSet::kX86: 265 return instruction_set_details::kX86StackOverflowReservedBytes; 266 267 case InstructionSet::kX86_64: 268 return instruction_set_details::kX86_64StackOverflowReservedBytes; 269 270 case InstructionSet::kNone: 271 instruction_set_details::GetStackOverflowReservedBytesFailure( 272 "kNone has no stack overflow size"); 273 } 274 instruction_set_details::GetStackOverflowReservedBytesFailure("Unknown instruction set"); 275 } 276 277 // The following definitions create return types for two word-sized entities that will be passed 278 // in registers so that memory operations for the interface trampolines can be avoided. The entities 279 // are the resolved method and the pointer to the code to be invoked. 280 // 281 // On x86, ARM32 and MIPS, this is given for a *scalar* 64bit value. The definition thus *must* be 282 // uint64_t or long long int. 283 // 284 // On x86_64, ARM64 and MIPS64, structs are decomposed for allocation, so we can create a structs of 285 // two size_t-sized values. 286 // 287 // We need two operations: 288 // 289 // 1) A flag value that signals failure. The assembly stubs expect the lower part to be "0". 290 // GetTwoWordFailureValue() will return a value that has lower part == 0. 291 // 292 // 2) A value that combines two word-sized values. 293 // GetTwoWordSuccessValue() constructs this. 294 // 295 // IMPORTANT: If you use this to transfer object pointers, it is your responsibility to ensure 296 // that the object does not move or the value is updated. Simple use of this is NOT SAFE 297 // when the garbage collector can move objects concurrently. Ensure that required locks 298 // are held when using! 299 300 #if defined(__i386__) || defined(__arm__) || (defined(__mips__) && !defined(__LP64__)) 301 typedef uint64_t TwoWordReturn; 302 303 // Encodes method_ptr==nullptr and code_ptr==nullptr 304 static inline constexpr TwoWordReturn GetTwoWordFailureValue() { 305 return 0; 306 } 307 308 // Use the lower 32b for the method pointer and the upper 32b for the code pointer. 309 static inline constexpr TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) { 310 static_assert(sizeof(uint32_t) == sizeof(uintptr_t), "Unexpected size difference"); 311 uint32_t lo32 = lo; 312 uint64_t hi64 = static_cast<uint64_t>(hi); 313 return ((hi64 << 32) | lo32); 314 } 315 316 #elif defined(__x86_64__) || defined(__aarch64__) || (defined(__mips__) && defined(__LP64__)) 317 318 // Note: TwoWordReturn can't be constexpr for 64-bit targets. We'd need a constexpr constructor, 319 // which would violate C-linkage in the entrypoint functions. 320 321 struct TwoWordReturn { 322 uintptr_t lo; 323 uintptr_t hi; 324 }; 325 326 // Encodes method_ptr==nullptr. Leaves random value in code pointer. 327 static inline TwoWordReturn GetTwoWordFailureValue() { 328 TwoWordReturn ret; 329 ret.lo = 0; 330 return ret; 331 } 332 333 // Write values into their respective members. 334 static inline TwoWordReturn GetTwoWordSuccessValue(uintptr_t hi, uintptr_t lo) { 335 TwoWordReturn ret; 336 ret.lo = lo; 337 ret.hi = hi; 338 return ret; 339 } 340 #else 341 #error "Unsupported architecture" 342 #endif 343 344 } // namespace art 345 346 #endif // ART_LIBARTBASE_ARCH_INSTRUCTION_SET_H_ 347
