1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _DRM_MODE_H 20 #define _DRM_MODE_H 21 #include "drm.h" 22 #ifdef __cplusplus 23 extern "C" { 24 #endif 25 #define DRM_DISPLAY_INFO_LEN 32 26 #define DRM_CONNECTOR_NAME_LEN 32 27 #define DRM_DISPLAY_MODE_LEN 32 28 #define DRM_PROP_NAME_LEN 32 29 #define DRM_MODE_TYPE_BUILTIN (1 << 0) 30 #define DRM_MODE_TYPE_CLOCK_C ((1 << 1) | DRM_MODE_TYPE_BUILTIN) 31 #define DRM_MODE_TYPE_CRTC_C ((1 << 2) | DRM_MODE_TYPE_BUILTIN) 32 #define DRM_MODE_TYPE_PREFERRED (1 << 3) 33 #define DRM_MODE_TYPE_DEFAULT (1 << 4) 34 #define DRM_MODE_TYPE_USERDEF (1 << 5) 35 #define DRM_MODE_TYPE_DRIVER (1 << 6) 36 #define DRM_MODE_TYPE_ALL (DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_USERDEF | DRM_MODE_TYPE_DRIVER) 37 #define DRM_MODE_FLAG_PHSYNC (1 << 0) 38 #define DRM_MODE_FLAG_NHSYNC (1 << 1) 39 #define DRM_MODE_FLAG_PVSYNC (1 << 2) 40 #define DRM_MODE_FLAG_NVSYNC (1 << 3) 41 #define DRM_MODE_FLAG_INTERLACE (1 << 4) 42 #define DRM_MODE_FLAG_DBLSCAN (1 << 5) 43 #define DRM_MODE_FLAG_CSYNC (1 << 6) 44 #define DRM_MODE_FLAG_PCSYNC (1 << 7) 45 #define DRM_MODE_FLAG_NCSYNC (1 << 8) 46 #define DRM_MODE_FLAG_HSKEW (1 << 9) 47 #define DRM_MODE_FLAG_BCAST (1 << 10) 48 #define DRM_MODE_FLAG_PIXMUX (1 << 11) 49 #define DRM_MODE_FLAG_DBLCLK (1 << 12) 50 #define DRM_MODE_FLAG_CLKDIV2 (1 << 13) 51 #define DRM_MODE_FLAG_3D_MASK (0x1f << 14) 52 #define DRM_MODE_FLAG_3D_NONE (0 << 14) 53 #define DRM_MODE_FLAG_3D_FRAME_PACKING (1 << 14) 54 #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2 << 14) 55 #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3 << 14) 56 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4 << 14) 57 #define DRM_MODE_FLAG_3D_L_DEPTH (5 << 14) 58 #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6 << 14) 59 #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7 << 14) 60 #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8 << 14) 61 #define DRM_MODE_PICTURE_ASPECT_NONE 0 62 #define DRM_MODE_PICTURE_ASPECT_4_3 1 63 #define DRM_MODE_PICTURE_ASPECT_16_9 2 64 #define DRM_MODE_PICTURE_ASPECT_64_27 3 65 #define DRM_MODE_PICTURE_ASPECT_256_135 4 66 #define DRM_MODE_CONTENT_TYPE_NO_DATA 0 67 #define DRM_MODE_CONTENT_TYPE_GRAPHICS 1 68 #define DRM_MODE_CONTENT_TYPE_PHOTO 2 69 #define DRM_MODE_CONTENT_TYPE_CINEMA 3 70 #define DRM_MODE_CONTENT_TYPE_GAME 4 71 #define DRM_MODE_FLAG_PIC_AR_MASK (0x0F << 19) 72 #define DRM_MODE_FLAG_PIC_AR_NONE (DRM_MODE_PICTURE_ASPECT_NONE << 19) 73 #define DRM_MODE_FLAG_PIC_AR_4_3 (DRM_MODE_PICTURE_ASPECT_4_3 << 19) 74 #define DRM_MODE_FLAG_PIC_AR_16_9 (DRM_MODE_PICTURE_ASPECT_16_9 << 19) 75 #define DRM_MODE_FLAG_PIC_AR_64_27 (DRM_MODE_PICTURE_ASPECT_64_27 << 19) 76 #define DRM_MODE_FLAG_PIC_AR_256_135 (DRM_MODE_PICTURE_ASPECT_256_135 << 19) 77 #define DRM_MODE_FLAG_ALL (DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLSCAN | DRM_MODE_FLAG_CSYNC | DRM_MODE_FLAG_PCSYNC | DRM_MODE_FLAG_NCSYNC | DRM_MODE_FLAG_HSKEW | DRM_MODE_FLAG_DBLCLK | DRM_MODE_FLAG_CLKDIV2 | DRM_MODE_FLAG_3D_MASK) 78 #define DRM_MODE_DPMS_ON 0 79 #define DRM_MODE_DPMS_STANDBY 1 80 #define DRM_MODE_DPMS_SUSPEND 2 81 #define DRM_MODE_DPMS_OFF 3 82 #define DRM_MODE_SCALE_NONE 0 83 #define DRM_MODE_SCALE_FULLSCREEN 1 84 #define DRM_MODE_SCALE_CENTER 2 85 #define DRM_MODE_SCALE_ASPECT 3 86 #define DRM_MODE_DITHERING_OFF 0 87 #define DRM_MODE_DITHERING_ON 1 88 #define DRM_MODE_DITHERING_AUTO 2 89 #define DRM_MODE_DIRTY_OFF 0 90 #define DRM_MODE_DIRTY_ON 1 91 #define DRM_MODE_DIRTY_ANNOTATE 2 92 #define DRM_MODE_LINK_STATUS_GOOD 0 93 #define DRM_MODE_LINK_STATUS_BAD 1 94 #define DRM_MODE_ROTATE_0 (1 << 0) 95 #define DRM_MODE_ROTATE_90 (1 << 1) 96 #define DRM_MODE_ROTATE_180 (1 << 2) 97 #define DRM_MODE_ROTATE_270 (1 << 3) 98 #define DRM_MODE_ROTATE_MASK (DRM_MODE_ROTATE_0 | DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_180 | DRM_MODE_ROTATE_270) 99 #define DRM_MODE_REFLECT_X (1 << 4) 100 #define DRM_MODE_REFLECT_Y (1 << 5) 101 #define DRM_MODE_REFLECT_MASK (DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y) 102 #define DRM_MODE_CONTENT_PROTECTION_UNDESIRED 0 103 #define DRM_MODE_CONTENT_PROTECTION_DESIRED 1 104 #define DRM_MODE_CONTENT_PROTECTION_ENABLED 2 105 struct drm_mode_modeinfo { 106 __u32 clock; 107 __u16 hdisplay; 108 __u16 hsync_start; 109 __u16 hsync_end; 110 __u16 htotal; 111 __u16 hskew; 112 __u16 vdisplay; 113 __u16 vsync_start; 114 __u16 vsync_end; 115 __u16 vtotal; 116 __u16 vscan; 117 __u32 vrefresh; 118 __u32 flags; 119 __u32 type; 120 char name[DRM_DISPLAY_MODE_LEN]; 121 }; 122 struct drm_mode_card_res { 123 __u64 fb_id_ptr; 124 __u64 crtc_id_ptr; 125 __u64 connector_id_ptr; 126 __u64 encoder_id_ptr; 127 __u32 count_fbs; 128 __u32 count_crtcs; 129 __u32 count_connectors; 130 __u32 count_encoders; 131 __u32 min_width; 132 __u32 max_width; 133 __u32 min_height; 134 __u32 max_height; 135 }; 136 struct drm_mode_crtc { 137 __u64 set_connectors_ptr; 138 __u32 count_connectors; 139 __u32 crtc_id; 140 __u32 fb_id; 141 __u32 x; 142 __u32 y; 143 __u32 gamma_size; 144 __u32 mode_valid; 145 struct drm_mode_modeinfo mode; 146 }; 147 #define DRM_MODE_PRESENT_TOP_FIELD (1 << 0) 148 #define DRM_MODE_PRESENT_BOTTOM_FIELD (1 << 1) 149 struct drm_mode_set_plane { 150 __u32 plane_id; 151 __u32 crtc_id; 152 __u32 fb_id; 153 __u32 flags; 154 __s32 crtc_x; 155 __s32 crtc_y; 156 __u32 crtc_w; 157 __u32 crtc_h; 158 __u32 src_x; 159 __u32 src_y; 160 __u32 src_h; 161 __u32 src_w; 162 }; 163 struct drm_mode_get_plane { 164 __u32 plane_id; 165 __u32 crtc_id; 166 __u32 fb_id; 167 __u32 possible_crtcs; 168 __u32 gamma_size; 169 __u32 count_format_types; 170 __u64 format_type_ptr; 171 }; 172 struct drm_mode_get_plane_res { 173 __u64 plane_id_ptr; 174 __u32 count_planes; 175 }; 176 #define DRM_MODE_ENCODER_NONE 0 177 #define DRM_MODE_ENCODER_DAC 1 178 #define DRM_MODE_ENCODER_TMDS 2 179 #define DRM_MODE_ENCODER_LVDS 3 180 #define DRM_MODE_ENCODER_TVDAC 4 181 #define DRM_MODE_ENCODER_VIRTUAL 5 182 #define DRM_MODE_ENCODER_DSI 6 183 #define DRM_MODE_ENCODER_DPMST 7 184 #define DRM_MODE_ENCODER_DPI 8 185 struct drm_mode_get_encoder { 186 __u32 encoder_id; 187 __u32 encoder_type; 188 __u32 crtc_id; 189 __u32 possible_crtcs; 190 __u32 possible_clones; 191 }; 192 enum drm_mode_subconnector { 193 DRM_MODE_SUBCONNECTOR_Automatic = 0, 194 DRM_MODE_SUBCONNECTOR_Unknown = 0, 195 DRM_MODE_SUBCONNECTOR_DVID = 3, 196 DRM_MODE_SUBCONNECTOR_DVIA = 4, 197 DRM_MODE_SUBCONNECTOR_Composite = 5, 198 DRM_MODE_SUBCONNECTOR_SVIDEO = 6, 199 DRM_MODE_SUBCONNECTOR_Component = 8, 200 DRM_MODE_SUBCONNECTOR_SCART = 9, 201 }; 202 #define DRM_MODE_CONNECTOR_Unknown 0 203 #define DRM_MODE_CONNECTOR_VGA 1 204 #define DRM_MODE_CONNECTOR_DVII 2 205 #define DRM_MODE_CONNECTOR_DVID 3 206 #define DRM_MODE_CONNECTOR_DVIA 4 207 #define DRM_MODE_CONNECTOR_Composite 5 208 #define DRM_MODE_CONNECTOR_SVIDEO 6 209 #define DRM_MODE_CONNECTOR_LVDS 7 210 #define DRM_MODE_CONNECTOR_Component 8 211 #define DRM_MODE_CONNECTOR_9PinDIN 9 212 #define DRM_MODE_CONNECTOR_DisplayPort 10 213 #define DRM_MODE_CONNECTOR_HDMIA 11 214 #define DRM_MODE_CONNECTOR_HDMIB 12 215 #define DRM_MODE_CONNECTOR_TV 13 216 #define DRM_MODE_CONNECTOR_eDP 14 217 #define DRM_MODE_CONNECTOR_VIRTUAL 15 218 #define DRM_MODE_CONNECTOR_DSI 16 219 #define DRM_MODE_CONNECTOR_DPI 17 220 #define DRM_MODE_CONNECTOR_WRITEBACK 18 221 struct drm_mode_get_connector { 222 __u64 encoders_ptr; 223 __u64 modes_ptr; 224 __u64 props_ptr; 225 __u64 prop_values_ptr; 226 __u32 count_modes; 227 __u32 count_props; 228 __u32 count_encoders; 229 __u32 encoder_id; 230 __u32 connector_id; 231 __u32 connector_type; 232 __u32 connector_type_id; 233 __u32 connection; 234 __u32 mm_width; 235 __u32 mm_height; 236 __u32 subpixel; 237 __u32 pad; 238 }; 239 #define DRM_MODE_PROP_PENDING (1 << 0) 240 #define DRM_MODE_PROP_RANGE (1 << 1) 241 #define DRM_MODE_PROP_IMMUTABLE (1 << 2) 242 #define DRM_MODE_PROP_ENUM (1 << 3) 243 #define DRM_MODE_PROP_BLOB (1 << 4) 244 #define DRM_MODE_PROP_BITMASK (1 << 5) 245 #define DRM_MODE_PROP_LEGACY_TYPE (DRM_MODE_PROP_RANGE | DRM_MODE_PROP_ENUM | DRM_MODE_PROP_BLOB | DRM_MODE_PROP_BITMASK) 246 #define DRM_MODE_PROP_EXTENDED_TYPE 0x0000ffc0 247 #define DRM_MODE_PROP_TYPE(n) ((n) << 6) 248 #define DRM_MODE_PROP_OBJECT DRM_MODE_PROP_TYPE(1) 249 #define DRM_MODE_PROP_SIGNED_RANGE DRM_MODE_PROP_TYPE(2) 250 #define DRM_MODE_PROP_ATOMIC 0x80000000 251 struct drm_mode_property_enum { 252 __u64 value; 253 char name[DRM_PROP_NAME_LEN]; 254 }; 255 struct drm_mode_get_property { 256 __u64 values_ptr; 257 __u64 enum_blob_ptr; 258 __u32 prop_id; 259 __u32 flags; 260 char name[DRM_PROP_NAME_LEN]; 261 __u32 count_values; 262 __u32 count_enum_blobs; 263 }; 264 struct drm_mode_connector_set_property { 265 __u64 value; 266 __u32 prop_id; 267 __u32 connector_id; 268 }; 269 #define DRM_MODE_OBJECT_CRTC 0xcccccccc 270 #define DRM_MODE_OBJECT_CONNECTOR 0xc0c0c0c0 271 #define DRM_MODE_OBJECT_ENCODER 0xe0e0e0e0 272 #define DRM_MODE_OBJECT_MODE 0xdededede 273 #define DRM_MODE_OBJECT_PROPERTY 0xb0b0b0b0 274 #define DRM_MODE_OBJECT_FB 0xfbfbfbfb 275 #define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb 276 #define DRM_MODE_OBJECT_PLANE 0xeeeeeeee 277 #define DRM_MODE_OBJECT_ANY 0 278 struct drm_mode_obj_get_properties { 279 __u64 props_ptr; 280 __u64 prop_values_ptr; 281 __u32 count_props; 282 __u32 obj_id; 283 __u32 obj_type; 284 }; 285 struct drm_mode_obj_set_property { 286 __u64 value; 287 __u32 prop_id; 288 __u32 obj_id; 289 __u32 obj_type; 290 }; 291 struct drm_mode_get_blob { 292 __u32 blob_id; 293 __u32 length; 294 __u64 data; 295 }; 296 struct drm_mode_fb_cmd { 297 __u32 fb_id; 298 __u32 width; 299 __u32 height; 300 __u32 pitch; 301 __u32 bpp; 302 __u32 depth; 303 __u32 handle; 304 }; 305 #define DRM_MODE_FB_INTERLACED (1 << 0) 306 #define DRM_MODE_FB_MODIFIERS (1 << 1) 307 struct drm_mode_fb_cmd2 { 308 __u32 fb_id; 309 __u32 width; 310 __u32 height; 311 __u32 pixel_format; 312 __u32 flags; 313 __u32 handles[4]; 314 __u32 pitches[4]; 315 __u32 offsets[4]; 316 __u64 modifier[4]; 317 }; 318 #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01 319 #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02 320 #define DRM_MODE_FB_DIRTY_FLAGS 0x03 321 #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256 322 struct drm_mode_fb_dirty_cmd { 323 __u32 fb_id; 324 __u32 flags; 325 __u32 color; 326 __u32 num_clips; 327 __u64 clips_ptr; 328 }; 329 struct drm_mode_mode_cmd { 330 __u32 connector_id; 331 struct drm_mode_modeinfo mode; 332 }; 333 #define DRM_MODE_CURSOR_BO 0x01 334 #define DRM_MODE_CURSOR_MOVE 0x02 335 #define DRM_MODE_CURSOR_FLAGS 0x03 336 struct drm_mode_cursor { 337 __u32 flags; 338 __u32 crtc_id; 339 __s32 x; 340 __s32 y; 341 __u32 width; 342 __u32 height; 343 __u32 handle; 344 }; 345 struct drm_mode_cursor2 { 346 __u32 flags; 347 __u32 crtc_id; 348 __s32 x; 349 __s32 y; 350 __u32 width; 351 __u32 height; 352 __u32 handle; 353 __s32 hot_x; 354 __s32 hot_y; 355 }; 356 struct drm_mode_crtc_lut { 357 __u32 crtc_id; 358 __u32 gamma_size; 359 __u64 red; 360 __u64 green; 361 __u64 blue; 362 }; 363 struct drm_color_ctm { 364 __u64 matrix[9]; 365 }; 366 struct drm_color_lut { 367 __u16 red; 368 __u16 green; 369 __u16 blue; 370 __u16 reserved; 371 }; 372 #define DRM_MODE_PAGE_FLIP_EVENT 0x01 373 #define DRM_MODE_PAGE_FLIP_ASYNC 0x02 374 #define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4 375 #define DRM_MODE_PAGE_FLIP_TARGET_RELATIVE 0x8 376 #define DRM_MODE_PAGE_FLIP_TARGET (DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE | DRM_MODE_PAGE_FLIP_TARGET_RELATIVE) 377 #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_PAGE_FLIP_TARGET) 378 struct drm_mode_crtc_page_flip { 379 __u32 crtc_id; 380 __u32 fb_id; 381 __u32 flags; 382 __u32 reserved; 383 __u64 user_data; 384 }; 385 struct drm_mode_crtc_page_flip_target { 386 __u32 crtc_id; 387 __u32 fb_id; 388 __u32 flags; 389 __u32 sequence; 390 __u64 user_data; 391 }; 392 struct drm_mode_create_dumb { 393 __u32 height; 394 __u32 width; 395 __u32 bpp; 396 __u32 flags; 397 __u32 handle; 398 __u32 pitch; 399 __u64 size; 400 }; 401 struct drm_mode_map_dumb { 402 __u32 handle; 403 __u32 pad; 404 __u64 offset; 405 }; 406 struct drm_mode_destroy_dumb { 407 __u32 handle; 408 }; 409 #define DRM_MODE_ATOMIC_TEST_ONLY 0x0100 410 #define DRM_MODE_ATOMIC_NONBLOCK 0x0200 411 #define DRM_MODE_ATOMIC_ALLOW_MODESET 0x0400 412 #define DRM_MODE_ATOMIC_FLAGS (DRM_MODE_PAGE_FLIP_EVENT | DRM_MODE_PAGE_FLIP_ASYNC | DRM_MODE_ATOMIC_TEST_ONLY | DRM_MODE_ATOMIC_NONBLOCK | DRM_MODE_ATOMIC_ALLOW_MODESET) 413 struct drm_mode_atomic { 414 __u32 flags; 415 __u32 count_objs; 416 __u64 objs_ptr; 417 __u64 count_props_ptr; 418 __u64 props_ptr; 419 __u64 prop_values_ptr; 420 __u64 reserved; 421 __u64 user_data; 422 }; 423 struct drm_format_modifier_blob { 424 #define FORMAT_BLOB_CURRENT 1 425 __u32 version; 426 __u32 flags; 427 __u32 count_formats; 428 __u32 formats_offset; 429 __u32 count_modifiers; 430 __u32 modifiers_offset; 431 }; 432 struct drm_format_modifier { 433 __u64 formats; 434 __u32 offset; 435 __u32 pad; 436 __u64 modifier; 437 }; 438 struct drm_mode_create_blob { 439 __u64 data; 440 __u32 length; 441 __u32 blob_id; 442 }; 443 struct drm_mode_destroy_blob { 444 __u32 blob_id; 445 }; 446 struct drm_mode_create_lease { 447 __u64 object_ids; 448 __u32 object_count; 449 __u32 flags; 450 __u32 lessee_id; 451 __u32 fd; 452 }; 453 struct drm_mode_list_lessees { 454 __u32 count_lessees; 455 __u32 pad; 456 __u64 lessees_ptr; 457 }; 458 struct drm_mode_get_lease { 459 __u32 count_objects; 460 __u32 pad; 461 __u64 objects_ptr; 462 }; 463 struct drm_mode_revoke_lease { 464 __u32 lessee_id; 465 }; 466 struct drm_mode_rect { 467 __s32 x1; 468 __s32 y1; 469 __s32 x2; 470 __s32 y2; 471 }; 472 #ifdef __cplusplus 473 } 474 #endif 475 #endif 476
