1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _UAPI_LINUX_ETHTOOL_H 20 #define _UAPI_LINUX_ETHTOOL_H 21 #include <linux/kernel.h> 22 #include <linux/types.h> 23 #include <linux/if_ether.h> 24 #include <limits.h> 25 struct ethtool_cmd { 26 __u32 cmd; 27 __u32 supported; 28 __u32 advertising; 29 __u16 speed; 30 __u8 duplex; 31 __u8 port; 32 __u8 phy_address; 33 __u8 transceiver; 34 __u8 autoneg; 35 __u8 mdio_support; 36 __u32 maxtxpkt; 37 __u32 maxrxpkt; 38 __u16 speed_hi; 39 __u8 eth_tp_mdix; 40 __u8 eth_tp_mdix_ctrl; 41 __u32 lp_advertising; 42 __u32 reserved[2]; 43 }; 44 #define ETH_MDIO_SUPPORTS_C22 1 45 #define ETH_MDIO_SUPPORTS_C45 2 46 #define ETHTOOL_FWVERS_LEN 32 47 #define ETHTOOL_BUSINFO_LEN 32 48 #define ETHTOOL_EROMVERS_LEN 32 49 struct ethtool_drvinfo { 50 __u32 cmd; 51 char driver[32]; 52 char version[32]; 53 char fw_version[ETHTOOL_FWVERS_LEN]; 54 char bus_info[ETHTOOL_BUSINFO_LEN]; 55 char erom_version[ETHTOOL_EROMVERS_LEN]; 56 char reserved2[12]; 57 __u32 n_priv_flags; 58 __u32 n_stats; 59 __u32 testinfo_len; 60 __u32 eedump_len; 61 __u32 regdump_len; 62 }; 63 #define SOPASS_MAX 6 64 struct ethtool_wolinfo { 65 __u32 cmd; 66 __u32 supported; 67 __u32 wolopts; 68 __u8 sopass[SOPASS_MAX]; 69 }; 70 struct ethtool_value { 71 __u32 cmd; 72 __u32 data; 73 }; 74 #define PFC_STORM_PREVENTION_AUTO 0xffff 75 #define PFC_STORM_PREVENTION_DISABLE 0 76 enum tunable_id { 77 ETHTOOL_ID_UNSPEC, 78 ETHTOOL_RX_COPYBREAK, 79 ETHTOOL_TX_COPYBREAK, 80 ETHTOOL_PFC_PREVENTION_TOUT, 81 __ETHTOOL_TUNABLE_COUNT, 82 }; 83 enum tunable_type_id { 84 ETHTOOL_TUNABLE_UNSPEC, 85 ETHTOOL_TUNABLE_U8, 86 ETHTOOL_TUNABLE_U16, 87 ETHTOOL_TUNABLE_U32, 88 ETHTOOL_TUNABLE_U64, 89 ETHTOOL_TUNABLE_STRING, 90 ETHTOOL_TUNABLE_S8, 91 ETHTOOL_TUNABLE_S16, 92 ETHTOOL_TUNABLE_S32, 93 ETHTOOL_TUNABLE_S64, 94 }; 95 struct ethtool_tunable { 96 __u32 cmd; 97 __u32 id; 98 __u32 type_id; 99 __u32 len; 100 void * data[0]; 101 }; 102 #define DOWNSHIFT_DEV_DEFAULT_COUNT 0xff 103 #define DOWNSHIFT_DEV_DISABLE 0 104 enum phy_tunable_id { 105 ETHTOOL_PHY_ID_UNSPEC, 106 ETHTOOL_PHY_DOWNSHIFT, 107 __ETHTOOL_PHY_TUNABLE_COUNT, 108 }; 109 struct ethtool_regs { 110 __u32 cmd; 111 __u32 version; 112 __u32 len; 113 __u8 data[0]; 114 }; 115 struct ethtool_eeprom { 116 __u32 cmd; 117 __u32 magic; 118 __u32 offset; 119 __u32 len; 120 __u8 data[0]; 121 }; 122 struct ethtool_eee { 123 __u32 cmd; 124 __u32 supported; 125 __u32 advertised; 126 __u32 lp_advertised; 127 __u32 eee_active; 128 __u32 eee_enabled; 129 __u32 tx_lpi_enabled; 130 __u32 tx_lpi_timer; 131 __u32 reserved[2]; 132 }; 133 struct ethtool_modinfo { 134 __u32 cmd; 135 __u32 type; 136 __u32 eeprom_len; 137 __u32 reserved[8]; 138 }; 139 struct ethtool_coalesce { 140 __u32 cmd; 141 __u32 rx_coalesce_usecs; 142 __u32 rx_max_coalesced_frames; 143 __u32 rx_coalesce_usecs_irq; 144 __u32 rx_max_coalesced_frames_irq; 145 __u32 tx_coalesce_usecs; 146 __u32 tx_max_coalesced_frames; 147 __u32 tx_coalesce_usecs_irq; 148 __u32 tx_max_coalesced_frames_irq; 149 __u32 stats_block_coalesce_usecs; 150 __u32 use_adaptive_rx_coalesce; 151 __u32 use_adaptive_tx_coalesce; 152 __u32 pkt_rate_low; 153 __u32 rx_coalesce_usecs_low; 154 __u32 rx_max_coalesced_frames_low; 155 __u32 tx_coalesce_usecs_low; 156 __u32 tx_max_coalesced_frames_low; 157 __u32 pkt_rate_high; 158 __u32 rx_coalesce_usecs_high; 159 __u32 rx_max_coalesced_frames_high; 160 __u32 tx_coalesce_usecs_high; 161 __u32 tx_max_coalesced_frames_high; 162 __u32 rate_sample_interval; 163 }; 164 struct ethtool_ringparam { 165 __u32 cmd; 166 __u32 rx_max_pending; 167 __u32 rx_mini_max_pending; 168 __u32 rx_jumbo_max_pending; 169 __u32 tx_max_pending; 170 __u32 rx_pending; 171 __u32 rx_mini_pending; 172 __u32 rx_jumbo_pending; 173 __u32 tx_pending; 174 }; 175 struct ethtool_channels { 176 __u32 cmd; 177 __u32 max_rx; 178 __u32 max_tx; 179 __u32 max_other; 180 __u32 max_combined; 181 __u32 rx_count; 182 __u32 tx_count; 183 __u32 other_count; 184 __u32 combined_count; 185 }; 186 struct ethtool_pauseparam { 187 __u32 cmd; 188 __u32 autoneg; 189 __u32 rx_pause; 190 __u32 tx_pause; 191 }; 192 #define ETH_GSTRING_LEN 32 193 enum ethtool_stringset { 194 ETH_SS_TEST = 0, 195 ETH_SS_STATS, 196 ETH_SS_PRIV_FLAGS, 197 ETH_SS_NTUPLE_FILTERS, 198 ETH_SS_FEATURES, 199 ETH_SS_RSS_HASH_FUNCS, 200 ETH_SS_TUNABLES, 201 ETH_SS_PHY_STATS, 202 ETH_SS_PHY_TUNABLES, 203 }; 204 struct ethtool_gstrings { 205 __u32 cmd; 206 __u32 string_set; 207 __u32 len; 208 __u8 data[0]; 209 }; 210 struct ethtool_sset_info { 211 __u32 cmd; 212 __u32 reserved; 213 __u64 sset_mask; 214 __u32 data[0]; 215 }; 216 enum ethtool_test_flags { 217 ETH_TEST_FL_OFFLINE = (1 << 0), 218 ETH_TEST_FL_FAILED = (1 << 1), 219 ETH_TEST_FL_EXTERNAL_LB = (1 << 2), 220 ETH_TEST_FL_EXTERNAL_LB_DONE = (1 << 3), 221 }; 222 struct ethtool_test { 223 __u32 cmd; 224 __u32 flags; 225 __u32 reserved; 226 __u32 len; 227 __u64 data[0]; 228 }; 229 struct ethtool_stats { 230 __u32 cmd; 231 __u32 n_stats; 232 __u64 data[0]; 233 }; 234 struct ethtool_perm_addr { 235 __u32 cmd; 236 __u32 size; 237 __u8 data[0]; 238 }; 239 enum ethtool_flags { 240 ETH_FLAG_TXVLAN = (1 << 7), 241 ETH_FLAG_RXVLAN = (1 << 8), 242 ETH_FLAG_LRO = (1 << 15), 243 ETH_FLAG_NTUPLE = (1 << 27), 244 ETH_FLAG_RXHASH = (1 << 28), 245 }; 246 struct ethtool_tcpip4_spec { 247 __be32 ip4src; 248 __be32 ip4dst; 249 __be16 psrc; 250 __be16 pdst; 251 __u8 tos; 252 }; 253 struct ethtool_ah_espip4_spec { 254 __be32 ip4src; 255 __be32 ip4dst; 256 __be32 spi; 257 __u8 tos; 258 }; 259 #define ETH_RX_NFC_IP4 1 260 struct ethtool_usrip4_spec { 261 __be32 ip4src; 262 __be32 ip4dst; 263 __be32 l4_4_bytes; 264 __u8 tos; 265 __u8 ip_ver; 266 __u8 proto; 267 }; 268 struct ethtool_tcpip6_spec { 269 __be32 ip6src[4]; 270 __be32 ip6dst[4]; 271 __be16 psrc; 272 __be16 pdst; 273 __u8 tclass; 274 }; 275 struct ethtool_ah_espip6_spec { 276 __be32 ip6src[4]; 277 __be32 ip6dst[4]; 278 __be32 spi; 279 __u8 tclass; 280 }; 281 struct ethtool_usrip6_spec { 282 __be32 ip6src[4]; 283 __be32 ip6dst[4]; 284 __be32 l4_4_bytes; 285 __u8 tclass; 286 __u8 l4_proto; 287 }; 288 union ethtool_flow_union { 289 struct ethtool_tcpip4_spec tcp_ip4_spec; 290 struct ethtool_tcpip4_spec udp_ip4_spec; 291 struct ethtool_tcpip4_spec sctp_ip4_spec; 292 struct ethtool_ah_espip4_spec ah_ip4_spec; 293 struct ethtool_ah_espip4_spec esp_ip4_spec; 294 struct ethtool_usrip4_spec usr_ip4_spec; 295 struct ethtool_tcpip6_spec tcp_ip6_spec; 296 struct ethtool_tcpip6_spec udp_ip6_spec; 297 struct ethtool_tcpip6_spec sctp_ip6_spec; 298 struct ethtool_ah_espip6_spec ah_ip6_spec; 299 struct ethtool_ah_espip6_spec esp_ip6_spec; 300 struct ethtool_usrip6_spec usr_ip6_spec; 301 struct ethhdr ether_spec; 302 __u8 hdata[52]; 303 }; 304 struct ethtool_flow_ext { 305 __u8 padding[2]; 306 unsigned char h_dest[ETH_ALEN]; 307 __be16 vlan_etype; 308 __be16 vlan_tci; 309 __be32 data[2]; 310 }; 311 struct ethtool_rx_flow_spec { 312 __u32 flow_type; 313 union ethtool_flow_union h_u; 314 struct ethtool_flow_ext h_ext; 315 union ethtool_flow_union m_u; 316 struct ethtool_flow_ext m_ext; 317 __u64 ring_cookie; 318 __u32 location; 319 }; 320 #define ETHTOOL_RX_FLOW_SPEC_RING 0x00000000FFFFFFFFLL 321 #define ETHTOOL_RX_FLOW_SPEC_RING_VF 0x000000FF00000000LL 322 #define ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF 32 323 struct ethtool_rxnfc { 324 __u32 cmd; 325 __u32 flow_type; 326 __u64 data; 327 struct ethtool_rx_flow_spec fs; 328 union { 329 __u32 rule_cnt; 330 __u32 rss_context; 331 }; 332 __u32 rule_locs[0]; 333 }; 334 struct ethtool_rxfh_indir { 335 __u32 cmd; 336 __u32 size; 337 __u32 ring_index[0]; 338 }; 339 struct ethtool_rxfh { 340 __u32 cmd; 341 __u32 rss_context; 342 __u32 indir_size; 343 __u32 key_size; 344 __u8 hfunc; 345 __u8 rsvd8[3]; 346 __u32 rsvd32; 347 __u32 rss_config[0]; 348 }; 349 #define ETH_RXFH_CONTEXT_ALLOC 0xffffffff 350 #define ETH_RXFH_INDIR_NO_CHANGE 0xffffffff 351 struct ethtool_rx_ntuple_flow_spec { 352 __u32 flow_type; 353 union { 354 struct ethtool_tcpip4_spec tcp_ip4_spec; 355 struct ethtool_tcpip4_spec udp_ip4_spec; 356 struct ethtool_tcpip4_spec sctp_ip4_spec; 357 struct ethtool_ah_espip4_spec ah_ip4_spec; 358 struct ethtool_ah_espip4_spec esp_ip4_spec; 359 struct ethtool_usrip4_spec usr_ip4_spec; 360 struct ethhdr ether_spec; 361 __u8 hdata[72]; 362 } h_u, m_u; 363 __u16 vlan_tag; 364 __u16 vlan_tag_mask; 365 __u64 data; 366 __u64 data_mask; 367 __s32 action; 368 #define ETHTOOL_RXNTUPLE_ACTION_DROP (- 1) 369 #define ETHTOOL_RXNTUPLE_ACTION_CLEAR (- 2) 370 }; 371 struct ethtool_rx_ntuple { 372 __u32 cmd; 373 struct ethtool_rx_ntuple_flow_spec fs; 374 }; 375 #define ETHTOOL_FLASH_MAX_FILENAME 128 376 enum ethtool_flash_op_type { 377 ETHTOOL_FLASH_ALL_REGIONS = 0, 378 }; 379 struct ethtool_flash { 380 __u32 cmd; 381 __u32 region; 382 char data[ETHTOOL_FLASH_MAX_FILENAME]; 383 }; 384 struct ethtool_dump { 385 __u32 cmd; 386 __u32 version; 387 __u32 flag; 388 __u32 len; 389 __u8 data[0]; 390 }; 391 #define ETH_FW_DUMP_DISABLE 0 392 struct ethtool_get_features_block { 393 __u32 available; 394 __u32 requested; 395 __u32 active; 396 __u32 never_changed; 397 }; 398 struct ethtool_gfeatures { 399 __u32 cmd; 400 __u32 size; 401 struct ethtool_get_features_block features[0]; 402 }; 403 struct ethtool_set_features_block { 404 __u32 valid; 405 __u32 requested; 406 }; 407 struct ethtool_sfeatures { 408 __u32 cmd; 409 __u32 size; 410 struct ethtool_set_features_block features[0]; 411 }; 412 struct ethtool_ts_info { 413 __u32 cmd; 414 __u32 so_timestamping; 415 __s32 phc_index; 416 __u32 tx_types; 417 __u32 tx_reserved[3]; 418 __u32 rx_filters; 419 __u32 rx_reserved[3]; 420 }; 421 enum ethtool_sfeatures_retval_bits { 422 ETHTOOL_F_UNSUPPORTED__BIT, 423 ETHTOOL_F_WISH__BIT, 424 ETHTOOL_F_COMPAT__BIT, 425 }; 426 #define ETHTOOL_F_UNSUPPORTED (1 << ETHTOOL_F_UNSUPPORTED__BIT) 427 #define ETHTOOL_F_WISH (1 << ETHTOOL_F_WISH__BIT) 428 #define ETHTOOL_F_COMPAT (1 << ETHTOOL_F_COMPAT__BIT) 429 #define MAX_NUM_QUEUE 4096 430 struct ethtool_per_queue_op { 431 __u32 cmd; 432 __u32 sub_command; 433 __u32 queue_mask[__KERNEL_DIV_ROUND_UP(MAX_NUM_QUEUE, 32)]; 434 char data[]; 435 }; 436 struct ethtool_fecparam { 437 __u32 cmd; 438 __u32 active_fec; 439 __u32 fec; 440 __u32 reserved; 441 }; 442 enum ethtool_fec_config_bits { 443 ETHTOOL_FEC_NONE_BIT, 444 ETHTOOL_FEC_AUTO_BIT, 445 ETHTOOL_FEC_OFF_BIT, 446 ETHTOOL_FEC_RS_BIT, 447 ETHTOOL_FEC_BASER_BIT, 448 }; 449 #define ETHTOOL_FEC_NONE (1 << ETHTOOL_FEC_NONE_BIT) 450 #define ETHTOOL_FEC_AUTO (1 << ETHTOOL_FEC_AUTO_BIT) 451 #define ETHTOOL_FEC_OFF (1 << ETHTOOL_FEC_OFF_BIT) 452 #define ETHTOOL_FEC_RS (1 << ETHTOOL_FEC_RS_BIT) 453 #define ETHTOOL_FEC_BASER (1 << ETHTOOL_FEC_BASER_BIT) 454 #define ETHTOOL_GSET 0x00000001 455 #define ETHTOOL_SSET 0x00000002 456 #define ETHTOOL_GDRVINFO 0x00000003 457 #define ETHTOOL_GREGS 0x00000004 458 #define ETHTOOL_GWOL 0x00000005 459 #define ETHTOOL_SWOL 0x00000006 460 #define ETHTOOL_GMSGLVL 0x00000007 461 #define ETHTOOL_SMSGLVL 0x00000008 462 #define ETHTOOL_NWAY_RST 0x00000009 463 #define ETHTOOL_GLINK 0x0000000a 464 #define ETHTOOL_GEEPROM 0x0000000b 465 #define ETHTOOL_SEEPROM 0x0000000c 466 #define ETHTOOL_GCOALESCE 0x0000000e 467 #define ETHTOOL_SCOALESCE 0x0000000f 468 #define ETHTOOL_GRINGPARAM 0x00000010 469 #define ETHTOOL_SRINGPARAM 0x00000011 470 #define ETHTOOL_GPAUSEPARAM 0x00000012 471 #define ETHTOOL_SPAUSEPARAM 0x00000013 472 #define ETHTOOL_GRXCSUM 0x00000014 473 #define ETHTOOL_SRXCSUM 0x00000015 474 #define ETHTOOL_GTXCSUM 0x00000016 475 #define ETHTOOL_STXCSUM 0x00000017 476 #define ETHTOOL_GSG 0x00000018 477 #define ETHTOOL_SSG 0x00000019 478 #define ETHTOOL_TEST 0x0000001a 479 #define ETHTOOL_GSTRINGS 0x0000001b 480 #define ETHTOOL_PHYS_ID 0x0000001c 481 #define ETHTOOL_GSTATS 0x0000001d 482 #define ETHTOOL_GTSO 0x0000001e 483 #define ETHTOOL_STSO 0x0000001f 484 #define ETHTOOL_GPERMADDR 0x00000020 485 #define ETHTOOL_GUFO 0x00000021 486 #define ETHTOOL_SUFO 0x00000022 487 #define ETHTOOL_GGSO 0x00000023 488 #define ETHTOOL_SGSO 0x00000024 489 #define ETHTOOL_GFLAGS 0x00000025 490 #define ETHTOOL_SFLAGS 0x00000026 491 #define ETHTOOL_GPFLAGS 0x00000027 492 #define ETHTOOL_SPFLAGS 0x00000028 493 #define ETHTOOL_GRXFH 0x00000029 494 #define ETHTOOL_SRXFH 0x0000002a 495 #define ETHTOOL_GGRO 0x0000002b 496 #define ETHTOOL_SGRO 0x0000002c 497 #define ETHTOOL_GRXRINGS 0x0000002d 498 #define ETHTOOL_GRXCLSRLCNT 0x0000002e 499 #define ETHTOOL_GRXCLSRULE 0x0000002f 500 #define ETHTOOL_GRXCLSRLALL 0x00000030 501 #define ETHTOOL_SRXCLSRLDEL 0x00000031 502 #define ETHTOOL_SRXCLSRLINS 0x00000032 503 #define ETHTOOL_FLASHDEV 0x00000033 504 #define ETHTOOL_RESET 0x00000034 505 #define ETHTOOL_SRXNTUPLE 0x00000035 506 #define ETHTOOL_GRXNTUPLE 0x00000036 507 #define ETHTOOL_GSSET_INFO 0x00000037 508 #define ETHTOOL_GRXFHINDIR 0x00000038 509 #define ETHTOOL_SRXFHINDIR 0x00000039 510 #define ETHTOOL_GFEATURES 0x0000003a 511 #define ETHTOOL_SFEATURES 0x0000003b 512 #define ETHTOOL_GCHANNELS 0x0000003c 513 #define ETHTOOL_SCHANNELS 0x0000003d 514 #define ETHTOOL_SET_DUMP 0x0000003e 515 #define ETHTOOL_GET_DUMP_FLAG 0x0000003f 516 #define ETHTOOL_GET_DUMP_DATA 0x00000040 517 #define ETHTOOL_GET_TS_INFO 0x00000041 518 #define ETHTOOL_GMODULEINFO 0x00000042 519 #define ETHTOOL_GMODULEEEPROM 0x00000043 520 #define ETHTOOL_GEEE 0x00000044 521 #define ETHTOOL_SEEE 0x00000045 522 #define ETHTOOL_GRSSH 0x00000046 523 #define ETHTOOL_SRSSH 0x00000047 524 #define ETHTOOL_GTUNABLE 0x00000048 525 #define ETHTOOL_STUNABLE 0x00000049 526 #define ETHTOOL_GPHYSTATS 0x0000004a 527 #define ETHTOOL_PERQUEUE 0x0000004b 528 #define ETHTOOL_GLINKSETTINGS 0x0000004c 529 #define ETHTOOL_SLINKSETTINGS 0x0000004d 530 #define ETHTOOL_PHY_GTUNABLE 0x0000004e 531 #define ETHTOOL_PHY_STUNABLE 0x0000004f 532 #define ETHTOOL_GFECPARAM 0x00000050 533 #define ETHTOOL_SFECPARAM 0x00000051 534 #define SPARC_ETH_GSET ETHTOOL_GSET 535 #define SPARC_ETH_SSET ETHTOOL_SSET 536 enum ethtool_link_mode_bit_indices { 537 ETHTOOL_LINK_MODE_10baseT_Half_BIT = 0, 538 ETHTOOL_LINK_MODE_10baseT_Full_BIT = 1, 539 ETHTOOL_LINK_MODE_100baseT_Half_BIT = 2, 540 ETHTOOL_LINK_MODE_100baseT_Full_BIT = 3, 541 ETHTOOL_LINK_MODE_1000baseT_Half_BIT = 4, 542 ETHTOOL_LINK_MODE_1000baseT_Full_BIT = 5, 543 ETHTOOL_LINK_MODE_Autoneg_BIT = 6, 544 ETHTOOL_LINK_MODE_TP_BIT = 7, 545 ETHTOOL_LINK_MODE_AUI_BIT = 8, 546 ETHTOOL_LINK_MODE_MII_BIT = 9, 547 ETHTOOL_LINK_MODE_FIBRE_BIT = 10, 548 ETHTOOL_LINK_MODE_BNC_BIT = 11, 549 ETHTOOL_LINK_MODE_10000baseT_Full_BIT = 12, 550 ETHTOOL_LINK_MODE_Pause_BIT = 13, 551 ETHTOOL_LINK_MODE_Asym_Pause_BIT = 14, 552 ETHTOOL_LINK_MODE_2500baseX_Full_BIT = 15, 553 ETHTOOL_LINK_MODE_Backplane_BIT = 16, 554 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT = 17, 555 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT = 18, 556 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT = 19, 557 ETHTOOL_LINK_MODE_10000baseR_FEC_BIT = 20, 558 ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT = 21, 559 ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT = 22, 560 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT = 23, 561 ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT = 24, 562 ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT = 25, 563 ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT = 26, 564 ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT = 27, 565 ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT = 28, 566 ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT = 29, 567 ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT = 30, 568 ETHTOOL_LINK_MODE_25000baseCR_Full_BIT = 31, 569 ETHTOOL_LINK_MODE_25000baseKR_Full_BIT = 32, 570 ETHTOOL_LINK_MODE_25000baseSR_Full_BIT = 33, 571 ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT = 34, 572 ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT = 35, 573 ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT = 36, 574 ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT = 37, 575 ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT = 38, 576 ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT = 39, 577 ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT = 40, 578 ETHTOOL_LINK_MODE_1000baseX_Full_BIT = 41, 579 ETHTOOL_LINK_MODE_10000baseCR_Full_BIT = 42, 580 ETHTOOL_LINK_MODE_10000baseSR_Full_BIT = 43, 581 ETHTOOL_LINK_MODE_10000baseLR_Full_BIT = 44, 582 ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT = 45, 583 ETHTOOL_LINK_MODE_10000baseER_Full_BIT = 46, 584 ETHTOOL_LINK_MODE_2500baseT_Full_BIT = 47, 585 ETHTOOL_LINK_MODE_5000baseT_Full_BIT = 48, 586 ETHTOOL_LINK_MODE_FEC_NONE_BIT = 49, 587 ETHTOOL_LINK_MODE_FEC_RS_BIT = 50, 588 ETHTOOL_LINK_MODE_FEC_BASER_BIT = 51, 589 __ETHTOOL_LINK_MODE_LAST = ETHTOOL_LINK_MODE_FEC_BASER_BIT, 590 }; 591 #define __ETHTOOL_LINK_MODE_LEGACY_MASK(base_name) (1UL << (ETHTOOL_LINK_MODE_ ##base_name ##_BIT)) 592 #define SUPPORTED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 593 #define SUPPORTED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 594 #define SUPPORTED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 595 #define SUPPORTED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 596 #define SUPPORTED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 597 #define SUPPORTED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 598 #define SUPPORTED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 599 #define SUPPORTED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 600 #define SUPPORTED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 601 #define SUPPORTED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 602 #define SUPPORTED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 603 #define SUPPORTED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 604 #define SUPPORTED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 605 #define SUPPORTED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 606 #define SUPPORTED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 607 #define SUPPORTED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 608 #define SUPPORTED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 609 #define SUPPORTED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 610 #define SUPPORTED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 611 #define SUPPORTED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 612 #define SUPPORTED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 613 #define SUPPORTED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 614 #define SUPPORTED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 615 #define SUPPORTED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 616 #define SUPPORTED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 617 #define SUPPORTED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 618 #define SUPPORTED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 619 #define SUPPORTED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 620 #define SUPPORTED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 621 #define SUPPORTED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 622 #define SUPPORTED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 623 #define ADVERTISED_10baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Half) 624 #define ADVERTISED_10baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10baseT_Full) 625 #define ADVERTISED_100baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Half) 626 #define ADVERTISED_100baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(100baseT_Full) 627 #define ADVERTISED_1000baseT_Half __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Half) 628 #define ADVERTISED_1000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseT_Full) 629 #define ADVERTISED_Autoneg __ETHTOOL_LINK_MODE_LEGACY_MASK(Autoneg) 630 #define ADVERTISED_TP __ETHTOOL_LINK_MODE_LEGACY_MASK(TP) 631 #define ADVERTISED_AUI __ETHTOOL_LINK_MODE_LEGACY_MASK(AUI) 632 #define ADVERTISED_MII __ETHTOOL_LINK_MODE_LEGACY_MASK(MII) 633 #define ADVERTISED_FIBRE __ETHTOOL_LINK_MODE_LEGACY_MASK(FIBRE) 634 #define ADVERTISED_BNC __ETHTOOL_LINK_MODE_LEGACY_MASK(BNC) 635 #define ADVERTISED_10000baseT_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseT_Full) 636 #define ADVERTISED_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Pause) 637 #define ADVERTISED_Asym_Pause __ETHTOOL_LINK_MODE_LEGACY_MASK(Asym_Pause) 638 #define ADVERTISED_2500baseX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(2500baseX_Full) 639 #define ADVERTISED_Backplane __ETHTOOL_LINK_MODE_LEGACY_MASK(Backplane) 640 #define ADVERTISED_1000baseKX_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(1000baseKX_Full) 641 #define ADVERTISED_10000baseKX4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKX4_Full) 642 #define ADVERTISED_10000baseKR_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseKR_Full) 643 #define ADVERTISED_10000baseR_FEC __ETHTOOL_LINK_MODE_LEGACY_MASK(10000baseR_FEC) 644 #define ADVERTISED_20000baseMLD2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseMLD2_Full) 645 #define ADVERTISED_20000baseKR2_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(20000baseKR2_Full) 646 #define ADVERTISED_40000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseKR4_Full) 647 #define ADVERTISED_40000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseCR4_Full) 648 #define ADVERTISED_40000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseSR4_Full) 649 #define ADVERTISED_40000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(40000baseLR4_Full) 650 #define ADVERTISED_56000baseKR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseKR4_Full) 651 #define ADVERTISED_56000baseCR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseCR4_Full) 652 #define ADVERTISED_56000baseSR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseSR4_Full) 653 #define ADVERTISED_56000baseLR4_Full __ETHTOOL_LINK_MODE_LEGACY_MASK(56000baseLR4_Full) 654 #define SPEED_10 10 655 #define SPEED_100 100 656 #define SPEED_1000 1000 657 #define SPEED_2500 2500 658 #define SPEED_5000 5000 659 #define SPEED_10000 10000 660 #define SPEED_14000 14000 661 #define SPEED_20000 20000 662 #define SPEED_25000 25000 663 #define SPEED_40000 40000 664 #define SPEED_50000 50000 665 #define SPEED_56000 56000 666 #define SPEED_100000 100000 667 #define SPEED_UNKNOWN - 1 668 #define DUPLEX_HALF 0x00 669 #define DUPLEX_FULL 0x01 670 #define DUPLEX_UNKNOWN 0xff 671 #define PORT_TP 0x00 672 #define PORT_AUI 0x01 673 #define PORT_MII 0x02 674 #define PORT_FIBRE 0x03 675 #define PORT_BNC 0x04 676 #define PORT_DA 0x05 677 #define PORT_NONE 0xef 678 #define PORT_OTHER 0xff 679 #define XCVR_INTERNAL 0x00 680 #define XCVR_EXTERNAL 0x01 681 #define XCVR_DUMMY1 0x02 682 #define XCVR_DUMMY2 0x03 683 #define XCVR_DUMMY3 0x04 684 #define AUTONEG_DISABLE 0x00 685 #define AUTONEG_ENABLE 0x01 686 #define ETH_TP_MDI_INVALID 0x00 687 #define ETH_TP_MDI 0x01 688 #define ETH_TP_MDI_X 0x02 689 #define ETH_TP_MDI_AUTO 0x03 690 #define WAKE_PHY (1 << 0) 691 #define WAKE_UCAST (1 << 1) 692 #define WAKE_MCAST (1 << 2) 693 #define WAKE_BCAST (1 << 3) 694 #define WAKE_ARP (1 << 4) 695 #define WAKE_MAGIC (1 << 5) 696 #define WAKE_MAGICSECURE (1 << 6) 697 #define WAKE_FILTER (1 << 7) 698 #define TCP_V4_FLOW 0x01 699 #define UDP_V4_FLOW 0x02 700 #define SCTP_V4_FLOW 0x03 701 #define AH_ESP_V4_FLOW 0x04 702 #define TCP_V6_FLOW 0x05 703 #define UDP_V6_FLOW 0x06 704 #define SCTP_V6_FLOW 0x07 705 #define AH_ESP_V6_FLOW 0x08 706 #define AH_V4_FLOW 0x09 707 #define ESP_V4_FLOW 0x0a 708 #define AH_V6_FLOW 0x0b 709 #define ESP_V6_FLOW 0x0c 710 #define IPV4_USER_FLOW 0x0d 711 #define IP_USER_FLOW IPV4_USER_FLOW 712 #define IPV6_USER_FLOW 0x0e 713 #define IPV4_FLOW 0x10 714 #define IPV6_FLOW 0x11 715 #define ETHER_FLOW 0x12 716 #define FLOW_EXT 0x80000000 717 #define FLOW_MAC_EXT 0x40000000 718 #define FLOW_RSS 0x20000000 719 #define RXH_L2DA (1 << 1) 720 #define RXH_VLAN (1 << 2) 721 #define RXH_L3_PROTO (1 << 3) 722 #define RXH_IP_SRC (1 << 4) 723 #define RXH_IP_DST (1 << 5) 724 #define RXH_L4_B_0_1 (1 << 6) 725 #define RXH_L4_B_2_3 (1 << 7) 726 #define RXH_DISCARD (1 << 31) 727 #define RX_CLS_FLOW_DISC 0xffffffffffffffffULL 728 #define RX_CLS_FLOW_WAKE 0xfffffffffffffffeULL 729 #define RX_CLS_LOC_SPECIAL 0x80000000 730 #define RX_CLS_LOC_ANY 0xffffffff 731 #define RX_CLS_LOC_FIRST 0xfffffffe 732 #define RX_CLS_LOC_LAST 0xfffffffd 733 #define ETH_MODULE_SFF_8079 0x1 734 #define ETH_MODULE_SFF_8079_LEN 256 735 #define ETH_MODULE_SFF_8472 0x2 736 #define ETH_MODULE_SFF_8472_LEN 512 737 #define ETH_MODULE_SFF_8636 0x3 738 #define ETH_MODULE_SFF_8636_LEN 256 739 #define ETH_MODULE_SFF_8436 0x4 740 #define ETH_MODULE_SFF_8436_LEN 256 741 enum ethtool_reset_flags { 742 ETH_RESET_MGMT = 1 << 0, 743 ETH_RESET_IRQ = 1 << 1, 744 ETH_RESET_DMA = 1 << 2, 745 ETH_RESET_FILTER = 1 << 3, 746 ETH_RESET_OFFLOAD = 1 << 4, 747 ETH_RESET_MAC = 1 << 5, 748 ETH_RESET_PHY = 1 << 6, 749 ETH_RESET_RAM = 1 << 7, 750 ETH_RESET_AP = 1 << 8, 751 ETH_RESET_DEDICATED = 0x0000ffff, 752 ETH_RESET_ALL = 0xffffffff, 753 }; 754 #define ETH_RESET_SHARED_SHIFT 16 755 struct ethtool_link_settings { 756 __u32 cmd; 757 __u32 speed; 758 __u8 duplex; 759 __u8 port; 760 __u8 phy_address; 761 __u8 autoneg; 762 __u8 mdio_support; 763 __u8 eth_tp_mdix; 764 __u8 eth_tp_mdix_ctrl; 765 __s8 link_mode_masks_nwords; 766 __u8 transceiver; 767 __u8 reserved1[3]; 768 __u32 reserved[7]; 769 __u32 link_mode_masks[0]; 770 }; 771 #endif 772
