1 /** @file 2 * 3 * Copyright (c) 2011-2015, ARM Limited. All rights reserved. 4 * Copyright (c) 2016, Hisilicon Limited. All rights reserved. 5 * Copyright (c) 2016, Linaro Limited. All rights reserved. 6 * 7 * This program and the accompanying materials 8 * are licensed and made available under the terms and conditions of the BSD License 9 * which accompanies this distribution. The full text of the license may be found at 10 * http://opensource.org/licenses/bsd-license.php 11 * 12 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 14 * 15 * Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/ 16 * 17 **/ 18 19 //#include "ArmPlatform.h" 20 Scope(_SB) 21 { 22 /* 0xD000E014:Hi1616 chip version reg[19:8], 0x102-after EC, 0x101/0-before EC. */ 23 OperationRegion (ECRA, SystemMemory, 0xD000E014, 0x4) 24 Field (ECRA, AnyAcc, NoLock, Preserve) 25 { 26 VECA, 32, 27 } 28 29 /* RBYV:Return by chip version 30 * the pcie device should be disable for chip's reason before EC, 31 * and the pcie device should be enable after EC for OS */ 32 Method (RBYV) 33 { 34 Store(VECA, local0) 35 And (local0, 0xFFF00, local1) 36 If (LEqual (local1, 0x10200)) { 37 Return (0xf) 38 } Else { 39 Return (0x0) 40 } 41 } 42 43 // 1P NA PCIe2 44 Device (PCI2) 45 { 46 Name (_HID, "PNP0A08") // PCI Express Root Bridge 47 Name (_CID, "PNP0A03") // Compatible PCI Root Bridge 48 Name(_SEG, 2) // Segment of this Root complex 49 Name(_BBN, 0x80) // Base Bus Number 50 Name(_CCA, 1) 51 Method (_CRS, 0, Serialized) { // Root complex resources 52 Name (RBUF, ResourceTemplate () { 53 WordBusNumber ( // Bus numbers assigned to this root 54 ResourceProducer, MinFixed, MaxFixed, PosDecode, 55 0, // AddressGranularity 56 0x80, // AddressMinimum - Minimum Bus Number 57 0x87, // AddressMaximum - Maximum Bus Number 58 0, // AddressTranslation - Set to 0 59 0x8 // RangeLength - Number of Busses 60 ) 61 QWordMemory ( // 64-bit BAR Windows 62 ResourceProducer, 63 PosDecode, 64 MinFixed, 65 MaxFixed, 66 Cacheable, 67 ReadWrite, 68 0x0, // Granularity 69 0xa8800000, // Min Base Address 70 0xaffeffff, // Max Base Address 71 0x0, // Translate 72 0x77f0000 // Length 73 ) 74 QWordIO ( 75 ResourceProducer, 76 MinFixed, 77 MaxFixed, 78 PosDecode, 79 EntireRange, 80 0x0, // Granularity 81 0x0, // Min Base Address 82 0xffff, // Max Base Address 83 0xafff0000, // Translate 84 0x10000 // Length 85 ) 86 }) // Name(RBUF) 87 Return (RBUF) 88 } // Method(_CRS) 89 Device (RES2) 90 { 91 Name (_HID, "HISI0081") // HiSi PCIe RC config base address 92 Name (_CID, "PNP0C02") // Motherboard reserved resource 93 Name (_CRS, ResourceTemplate (){ 94 Memory32Fixed (ReadWrite, 0xa00a0000 , 0x10000) 95 }) 96 } 97 Method (_STA, 0x0, NotSerialized) 98 { 99 Return (0xf) 100 } 101 102 } // Device(PCI2) 103 // 1p NB PCIe0 104 Device (PCI4) 105 { 106 Name (_HID, "PNP0A08") // PCI Express Root Bridge 107 Name (_CID, "PNP0A03") // Compatible PCI Root Bridge 108 Name(_SEG, 4) // Segment of this Root complex 109 Name(_BBN, 0x88) // Base Bus Number 110 Name(_CCA, 1) 111 Method (_CRS, 0, Serialized) { // Root complex resources 112 Name (RBUF, ResourceTemplate () { 113 WordBusNumber ( // Bus numbers assigned to this root 114 ResourceProducer, MinFixed, MaxFixed, PosDecode, 115 0, // AddressGranularity 116 0x88, // AddressMinimum - Minimum Bus Number 117 0x8f, // AddressMaximum - Maximum Bus Number 118 0, // AddressTranslation - Set to 0 119 0x8 // RangeLength - Number of Busses 120 ) 121 QWordMemory ( // 64-bit BAR Windows 122 ResourceProducer, 123 PosDecode, 124 MinFixed, 125 MaxFixed, 126 Cacheable, 127 ReadWrite, 128 0x0, // Granularity 129 0xa9000000, // Min Base Address 130 0xabfeffff, // Max Base Address 131 0x800000000, // Translate 132 0x2ff0000 // Length 133 ) 134 QWordIO ( 135 ResourceProducer, 136 MinFixed, 137 MaxFixed, 138 PosDecode, 139 EntireRange, 140 0x0, // Granularity 141 0x0, // Min Base Address 142 0xffff, // Max Base Address 143 0x8abff0000, // Translate 144 0x10000 // Length 145 ) 146 }) // Name(RBUF) 147 Return (RBUF) 148 } // Method(_CRS) 149 Device (RES4) 150 { 151 Name (_HID, "HISI0081") // HiSi PCIe RC config base address 152 Name (_CID, "PNP0C02") // Motherboard reserved resource 153 Name (_CRS, ResourceTemplate (){ 154 QwordMemory ( 155 ResourceProducer, 156 PosDecode, 157 MinFixed, 158 MaxFixed, 159 NonCacheable, 160 ReadWrite, 161 0x0, // Granularity 162 0x8a0090000, // Min Base Address 163 0x8a009ffff, // Max Base Address 164 0x0, // Translate 165 0x10000 // Length 166 ) 167 }) 168 } 169 Method (_STA, 0x0, NotSerialized) 170 { 171 Return (RBYV()) 172 } 173 174 } // Device(PCI4) 175 176 // 1P NB PCI1 177 Device (PCI5) 178 { 179 Name (_HID, "PNP0A08") // PCI Express Root Bridge 180 Name (_CID, "PNP0A03") // Compatible PCI Root Bridge 181 Name(_SEG, 5) // Segment of this Root complex 182 Name(_BBN, 0x0) // Base Bus Number 183 Name(_CCA, 1) 184 Method (_CRS, 0, Serialized) { // Root complex resources 185 Name (RBUF, ResourceTemplate () { 186 WordBusNumber ( // Bus numbers assigned to this root 187 ResourceProducer, MinFixed, MaxFixed, PosDecode, 188 0, // AddressGranularity 189 0x0, // AddressMinimum - Minimum Bus Number 190 0x7, // AddressMaximum - Maximum Bus Number 191 0, // AddressTranslation - Set to 0 192 0x8 // RangeLength - Number of Busses 193 ) 194 QWordMemory ( // 64-bit BAR Windows 195 ResourceProducer, 196 PosDecode, 197 MinFixed, 198 MaxFixed, 199 Cacheable, 200 ReadWrite, 201 0x0, // Granularity 202 0xb0800000, // Min Base Address 203 0xb7feffff, // Max Base Address 204 0x800000000, // Translate 205 0x77f0000 // Length 206 ) 207 QWordIO ( 208 ResourceProducer, 209 MinFixed, 210 MaxFixed, 211 PosDecode, 212 EntireRange, 213 0x0, // Granularity 214 0x0, // Min Base Address 215 0xffff, // Max Base Address 216 0x8b7ff0000, // Translate 217 0x10000 // Length 218 ) 219 }) // Name(RBUF) 220 Return (RBUF) 221 } // Method(_CRS) 222 Device (RES5) 223 { 224 Name (_HID, "HISI0081") // HiSi PCIe RC config base address 225 Name (_CID, "PNP0C02") // Motherboard reserved resource 226 Name (_CRS, ResourceTemplate (){ 227 QwordMemory ( 228 ResourceProducer, 229 PosDecode, 230 MinFixed, 231 MaxFixed, 232 NonCacheable, 233 ReadWrite, 234 0x0, // Granularity 235 0x8a0200000, // Min Base Address 236 0x8a020ffff, // Max Base Address 237 0x0, // Translate 238 0x10000 // Length 239 ) 240 }) 241 } 242 Method (_STA, 0x0, NotSerialized) 243 { 244 Return (RBYV()) 245 } 246 } // Device(PCI5) 247 248 // 1P NB PCIe2 249 Device (PCI6) 250 { 251 Name (_HID, "PNP0A08") // PCI Express Root Bridge 252 Name (_CID, "PNP0A03") // Compatible PCI Root Bridge 253 Name(_SEG, 0x6) // Segment of this Root complex 254 Name(_BBN, 0xc0) // Base Bus Number 255 Name(_CCA, 1) 256 Method (_CRS, 0, Serialized) { // Root complex resources 257 Name (RBUF, ResourceTemplate () { 258 WordBusNumber ( // Bus numbers assigned to this root 259 ResourceProducer, MinFixed, MaxFixed, PosDecode, 260 0, // AddressGranularity 261 0xc0, // AddressMinimum - Minimum Bus Number 262 0xc7, // AddressMaximum - Maximum Bus Number 263 0, // AddressTranslation - Set to 0 264 0x8 // RangeLength - Number of Busses 265 ) 266 QWordMemory ( // 64-bit BAR Windows 267 ResourceProducer, 268 PosDecode, 269 MinFixed, 270 MaxFixed, 271 Cacheable, 272 ReadWrite, 273 0x0, // Granularity 274 0xac900000, // Min Base Address 275 0xaffeffff, // Max Base Address 276 0x800000000, // Translate 277 0x36f0000 // Length 278 ) 279 QWordIO ( 280 ResourceProducer, 281 MinFixed, 282 MaxFixed, 283 PosDecode, 284 EntireRange, 285 0x0, // Granularity 286 0x0, // Min Base Address 287 0xffff, // Max Base Address 288 0x8afff0000, // Translate 289 0x10000 // Length 290 ) 291 }) // Name(RBUF) 292 Return (RBUF) 293 } // Method(_CRS) 294 Device (RES6) 295 { 296 Name (_HID, "HISI0081") // HiSi PCIe RC config base address 297 Name (_CID, "PNP0C02") // Motherboard reserved resource 298 Name (_CRS, ResourceTemplate (){ 299 QwordMemory ( 300 ResourceProducer, 301 PosDecode, 302 MinFixed, 303 MaxFixed, 304 NonCacheable, 305 ReadWrite, 306 0x0, // Granularity 307 0x8a00a0000, // Min Base Address 308 0x8a00affff, // Max Base Address 309 0x0, // Translate 310 0x10000 // Length 311 ) 312 }) 313 } 314 Method (_STA, 0x0, NotSerialized) 315 { 316 Return (RBYV()) 317 } 318 } // Device(PCI6) 319 // 1P NB PCIe3 320 Device (PCI7) 321 { 322 Name (_HID, "PNP0A08") // PCI Express Root Bridge 323 Name (_CID, "PNP0A03") // Compatible PCI Root Bridge 324 Name(_SEG, 0x7) // Segment of this Root complex 325 Name(_BBN, 0x90) // Base Bus Number 326 Name(_CCA, 1) 327 Method (_CRS, 0, Serialized) { // Root complex resources 328 Name (RBUF, ResourceTemplate () { 329 WordBusNumber ( // Bus numbers assigned to this root 330 ResourceProducer, MinFixed, MaxFixed, PosDecode, 331 0, // AddressGranularity 332 0x90, // AddressMinimum - Minimum Bus Number 333 0x97, // AddressMaximum - Maximum Bus Number 334 0, // AddressTranslation - Set to 0 335 0x8 // RangeLength - Number of Busses 336 ) 337 QWordMemory ( // 64-bit BAR Windows 338 ResourceProducer, 339 PosDecode, 340 MinFixed, 341 MaxFixed, 342 Cacheable, 343 ReadWrite, 344 0x0, // Granularity 345 0xb9800000, // Min Base Address 346 0xbffeffff, // Max Base Address 347 0x800000000, // Translate 348 0x67f0000 // Length 349 ) 350 QWordIO ( 351 ResourceProducer, 352 MinFixed, 353 MaxFixed, 354 PosDecode, 355 EntireRange, 356 0x0, // Granularity 357 0x0, // Min Base Address 358 0xffff, // Max Base Address 359 0x8bfff0000, // Translate 360 0x10000 // Length 361 ) 362 }) // Name(RBUF) 363 Return (RBUF) 364 } // Method(_CRS) 365 Device (RES7) 366 { 367 Name (_HID, "HISI0081") // HiSi PCIe RC config base address 368 Name (_CID, "PNP0C02") // Motherboard reserved resource 369 Name (_CRS, ResourceTemplate (){ 370 QwordMemory ( 371 ResourceProducer, 372 PosDecode, 373 MinFixed, 374 MaxFixed, 375 NonCacheable, 376 ReadWrite, 377 0x0, // Granularity 378 0x8a00b0000, // Min Base Address 379 0x8a00bffff, // Max Base Address 380 0x0, // Translate 381 0x10000 // Length 382 ) 383 }) 384 } 385 Method (_STA, 0x0, NotSerialized) 386 { 387 Return (RBYV()) 388 } 389 } // Device(PCI7) 390 // 2P NA PCIe2 391 Device (PCIa) 392 { 393 Name (_HID, "PNP0A08") // PCI Express Root Bridge 394 Name (_CID, "PNP0A03") // Compatible PCI Root Bridge 395 Name(_SEG, 0xa) // Segment of this Root complex 396 Name(_BBN, 0x10) // Base Bus Number 397 Name(_CCA, 1) 398 Method (_CRS, 0, Serialized) { // Root complex resources 399 Name (RBUF, ResourceTemplate () { 400 WordBusNumber ( // Bus numbers assigned to this root 401 ResourceProducer, MinFixed, MaxFixed, PosDecode, 402 0, // AddressGranularity 403 0x10, // AddressMinimum - Minimum Bus Number 404 0x1f, // AddressMaximum - Maximum Bus Number 405 0, // AddressTranslation - Set to 0 406 0x10 // RangeLength - Number of Busses 407 ) 408 QWordMemory ( // 64-bit BAR Windows 409 ResourceProducer, 410 PosDecode, 411 MinFixed, 412 MaxFixed, 413 Cacheable, 414 ReadWrite, 415 0x0, // Granularity 416 0x20000000, // Min Base Address 417 0xefffffff, // Max Base Address 418 0x65000000000, // Translate 419 0xd0000000 // Length 420 ) 421 QWordIO ( 422 ResourceProducer, 423 MinFixed, 424 MaxFixed, 425 PosDecode, 426 EntireRange, 427 0x0, // Granularity 428 0x0, // Min Base Address 429 0xffff, // Max Base Address 430 0x67fffff0000, // Translate 431 0x10000 // Length 432 ) 433 }) // Name(RBUF) 434 Return (RBUF) 435 } // Method(_CRS) 436 Device (RESa) 437 { 438 Name (_HID, "HISI0081") // HiSi PCIe RC config base address 439 Name (_CID, "PNP0C02") // Motherboard reserved resource 440 Name (_CRS, ResourceTemplate (){ 441 QwordMemory ( 442 ResourceProducer, 443 PosDecode, 444 MinFixed, 445 MaxFixed, 446 NonCacheable, 447 ReadWrite, 448 0x0, // Granularity 449 0x600a00a0000, // Min Base Address 450 0x600a00affff, // Max Base Address 451 0x0, // Translate 452 0x10000 // Length 453 ) 454 }) 455 } 456 Method (_STA, 0x0, NotSerialized) 457 { 458 Return (0xf) 459 } 460 } // Device(PCIa) 461 // 2P NB PCIe0 462 Device (PCIc) 463 { 464 Name (_HID, "PNP0A08") // PCI Express Root Bridge 465 Name (_CID, "PNP0A03") // Compatible PCI Root Bridge 466 Name(_SEG, 0xc) // Segment of this Root complex 467 Name(_BBN, 0x20) // Base Bus Number 468 Name(_CCA, 1) 469 Method (_CRS, 0, Serialized) { // Root complex resources 470 Name (RBUF, ResourceTemplate () { 471 WordBusNumber ( // Bus numbers assigned to this root 472 ResourceProducer, MinFixed, MaxFixed, PosDecode, 473 0, // AddressGranularity 474 0x20, // AddressMinimum - Minimum Bus Number 475 0x2f, // AddressMaximum - Maximum Bus Number 476 0, // AddressTranslation - Set to 0 477 0x10 // RangeLength - Number of Busses 478 ) 479 QWordMemory ( // 64-bit BAR Windows 480 ResourceProducer, 481 PosDecode, 482 MinFixed, 483 MaxFixed, 484 Cacheable, 485 ReadWrite, 486 0x0, // Granularity 487 0x30000000, // Min Base Address 488 0xefffffff, // Max Base Address 489 0x75000000000, // Translate 490 0xc0000000 // Length 491 ) 492 QWordIO ( 493 ResourceProducer, 494 MinFixed, 495 MaxFixed, 496 PosDecode, 497 EntireRange, 498 0x0, // Granularity 499 0x0, // Min Base Address 500 0xffff, // Max Base Address 501 0x77fffff0000, // Translate 502 0x10000 // Length 503 ) 504 }) // Name(RBUF) 505 Return (RBUF) 506 } // Method(_CRS) 507 Device (RESc) 508 { 509 Name (_HID, "HISI0081") // HiSi PCIe RC config base address 510 Name (_CID, "PNP0C02") // Motherboard reserved resource 511 Name (_CRS, ResourceTemplate (){ 512 QwordMemory ( 513 ResourceProducer, 514 PosDecode, 515 MinFixed, 516 MaxFixed, 517 NonCacheable, 518 ReadWrite, 519 0x0, // Granularity 520 0x700a0090000, // Min Base Address 521 0x700a009ffff, // Max Base Address 522 0x0, // Translate 523 0x10000 // Length 524 ) 525 }) 526 } 527 Method (_STA, 0x0, NotSerialized) 528 { 529 Return (RBYV()) 530 } 531 } // Device(PCIc) 532 533 //2P NB PCIe1 534 Device (PCId) 535 { 536 Name (_HID, "PNP0A08") // PCI Express Root Bridge 537 Name (_CID, "PNP0A03") // Compatible PCI Root Bridge 538 Name(_SEG, 0xd) // Segment of this Root complex 539 Name(_BBN, 0x30) // Base Bus Number 540 Name(_CCA, 1) 541 Method (_CRS, 0, Serialized) { // Root complex resources 542 Name (RBUF, ResourceTemplate () { 543 WordBusNumber ( // Bus numbers assigned to this root 544 ResourceProducer, MinFixed, MaxFixed, PosDecode, 545 0, // AddressGranularity 546 0x30, // AddressMinimum - Minimum Bus Number 547 0x3f, // AddressMaximum - Maximum Bus Number 548 0, // AddressTranslation - Set to 0 549 0x10 // RangeLength - Number of Busses 550 ) 551 QWordMemory ( // 64-bit BAR Windows 552 ResourceProducer, 553 PosDecode, 554 MinFixed, 555 MaxFixed, 556 Cacheable, 557 ReadWrite, 558 0x0, // Granularity 559 0x40000000, // Min Base Address 560 0xefffffff, // Max Base Address 561 0x79000000000, // Translate 562 0xB0000000 // Length 563 ) 564 QWordIO ( 565 ResourceProducer, 566 MinFixed, 567 MaxFixed, 568 PosDecode, 569 EntireRange, 570 0x0, // Granularity 571 0x0, // Min Base Address 572 0xffff, // Max Base Address 573 0x7bfffff0000, // Translate 574 0x10000 // Length 575 ) 576 }) // Name(RBUF) 577 Return (RBUF) 578 } // Method(_CRS) 579 Device (RESd) 580 { 581 Name (_HID, "HISI0081") // HiSi PCIe RC config base address 582 Name (_CID, "PNP0C02") // Motherboard reserved resource 583 Name (_CRS, ResourceTemplate (){ 584 QwordMemory ( 585 ResourceProducer, 586 PosDecode, 587 MinFixed, 588 MaxFixed, 589 NonCacheable, 590 ReadWrite, 591 0x0, // Granularity 592 0x700a0200000, // Min Base Address 593 0x700a020ffff, // Max Base Address 594 0x0, // Translate 595 0x10000 // Length 596 ) 597 }) 598 } 599 Method (_STA, 0x0, NotSerialized) 600 { 601 Return (RBYV()) 602 } 603 } // Device(PCId) 604 } 605 606
