1 /** @file 2 * 3 * Copyright (c) 2016, Hisilicon Limited. All rights reserved. 4 * Copyright (c) 2016, Linaro Limited. All rights reserved. 5 * 6 * This program and the accompanying materials 7 * are licensed and made available under the terms and conditions of the BSD License 8 * which accompanies this distribution. The full text of the license may be found at 9 * http://opensource.org/licenses/bsd-license.php 10 * 11 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. 13 * 14 **/ 15 16 #ifndef _SERDES_LIB_H_ 17 #define _SERDES_LIB_H_ 18 19 typedef enum { 20 EmHilink0Hccs1X8 = 0, 21 EmHilink0Pcie1X8 = 2, 22 EmHilink0Pcie1X4Pcie2X4 = 3, 23 EmHilink0Sas2X8 = 4, 24 EmHilink0Hccs1X8Width16, 25 EmHilink0Hccs1X8Width32, 26 EmHilink0Hccs1X8Speed5G, 27 } HILINK0_MODE_TYPE; 28 29 typedef enum { 30 EmHilink1Sas2X1 = 0, 31 EmHilink1Hccs0X8 = 1, 32 EmHilink1Pcie0X8 = 2, 33 EmHilink1Hccs0X8Width16, 34 EmHilink1Hccs0X8Width32, 35 EmHilink1Hccs0X8Speed5G, 36 } HILINK1_MODE_TYPE; 37 38 typedef enum { 39 EmHilink2Pcie2X8 = 0, 40 EmHilink2Hccs2X8 = 1, 41 EmHilink2Sas0X8 = 2, 42 EmHilink2Hccs2X8Width16, 43 EmHilink2Hccs2X8Width32, 44 EmHilink2Hccs2X8Speed5G, 45 } HILINK2_MODE_TYPE; 46 47 typedef enum { 48 EmHilink5Pcie3X4 = 0, 49 EmHilink5Pcie2X2Pcie3X2 = 1, 50 EmHilink5Sas1X4 = 2, 51 } HILINK5_MODE_TYPE; 52 53 54 typedef struct { 55 HILINK0_MODE_TYPE Hilink0Mode; 56 HILINK1_MODE_TYPE Hilink1Mode; 57 HILINK2_MODE_TYPE Hilink2Mode; 58 UINT32 Hilink3Mode; 59 UINT32 Hilink4Mode; 60 HILINK5_MODE_TYPE Hilink5Mode; 61 UINT32 Hilink6Mode; 62 UINT32 UseSsc; 63 } SERDES_PARAM; 64 65 #define SERDES_INVALID_MACRO_ID 0xFFFFFFFF 66 #define SERDES_INVALID_LANE_NUM 0xFFFFFFFF 67 #define SERDES_INVALID_RATE_MODE 0xFFFFFFFF 68 69 typedef struct { 70 UINT32 MacroId; 71 UINT32 DsNum; 72 UINT32 DsCfg; 73 } SERDES_POLARITY_INVERT; 74 75 EFI_STATUS OemGetSerdesParam (SERDES_PARAM *ParamA, SERDES_PARAM *ParamB, UINT32 SocketId); 76 extern SERDES_POLARITY_INVERT gSerdesPolarityTxDesc[]; 77 extern SERDES_POLARITY_INVERT gSerdesPolarityRxDesc[]; 78 UINT32 GetEthType(UINT8 EthChannel); 79 VOID SerdesEnableCtleDfe(UINT32 NimbusId, UINT32 Macro, UINT32 Lane, UINT32 LaneMode); 80 81 EFI_STATUS 82 EfiSerdesInitWrap (VOID); 83 INT32 SerdesReset(UINT32 SiclId, UINT32 Macro); 84 VOID SerdesLoadFirmware(UINT32 SiclId, UINT32 Macro); 85 86 #endif 87
