1 /*- 2 * Copyright (c) 2001 David E. O'Brien 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. Neither the name of the University nor the names of its contributors 13 * may be used to endorse or promote products derived from this software 14 * without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * @(#)endian.h 8.1 (Berkeley) 6/10/93 29 * $NetBSD: endian.h,v 1.7 1999/08/21 05:53:51 simonb Exp $ 30 * $FreeBSD$ 31 */ 32 /* 33 * Portions copyright (c) 2017, ARM Limited and Contributors. 34 * All rights reserved. 35 */ 36 37 #ifndef _MACHINE_ENDIAN_H_ 38 #define _MACHINE_ENDIAN_H_ 39 40 #include <sys/_types.h> 41 42 /* 43 * Definitions for byte order, according to byte significance from low 44 * address to high. 45 */ 46 #define _LITTLE_ENDIAN 1234 /* LSB first: i386, vax */ 47 #define _BIG_ENDIAN 4321 /* MSB first: 68000, ibm, net */ 48 #define _PDP_ENDIAN 3412 /* LSB first in word, MSW first in long */ 49 50 #define _BYTE_ORDER _LITTLE_ENDIAN 51 52 #if __BSD_VISIBLE 53 #define LITTLE_ENDIAN _LITTLE_ENDIAN 54 #define BIG_ENDIAN _BIG_ENDIAN 55 #define PDP_ENDIAN _PDP_ENDIAN 56 #define BYTE_ORDER _BYTE_ORDER 57 #endif 58 59 #define _QUAD_HIGHWORD 1 60 #define _QUAD_LOWWORD 0 61 #define __ntohl(x) (__bswap32(x)) 62 #define __ntohs(x) (__bswap16(x)) 63 #define __htonl(x) (__bswap32(x)) 64 #define __htons(x) (__bswap16(x)) 65 66 #ifdef AARCH32 67 static __inline __uint64_t 68 __bswap64(__uint64_t _x) 69 { 70 71 return ((_x >> 56) | ((_x >> 40) & 0xff00) | ((_x >> 24) & 0xff0000) | 72 ((_x >> 8) & 0xff000000) | ((_x << 8) & ((__uint64_t)0xff << 32)) | 73 ((_x << 24) & ((__uint64_t)0xff << 40)) | 74 ((_x << 40) & ((__uint64_t)0xff << 48)) | ((_x << 56))); 75 } 76 77 static __inline __uint32_t 78 __bswap32_var(__uint32_t v) 79 { 80 __uint32_t t1; 81 82 __asm __volatile("eor %1, %0, %0, ror #16\n" 83 "bic %1, %1, #0x00ff0000\n" 84 "mov %0, %0, ror #8\n" 85 "eor %0, %0, %1, lsr #8\n" 86 : "+r" (v), "=r" (t1)); 87 88 return (v); 89 } 90 91 static __inline __uint16_t 92 __bswap16_var(__uint16_t v) 93 { 94 __uint32_t ret = v & 0xffff; 95 96 __asm __volatile( 97 "mov %0, %0, ror #8\n" 98 "orr %0, %0, %0, lsr #16\n" 99 "bic %0, %0, %0, lsl #16" 100 : "+r" (ret)); 101 102 return ((__uint16_t)ret); 103 } 104 #elif defined AARCH64 105 static __inline __uint64_t 106 __bswap64(__uint64_t x) 107 { 108 __uint64_t ret; 109 110 __asm __volatile("rev %0, %1\n" 111 : "=&r" (ret), "+r" (x)); 112 113 return (ret); 114 } 115 116 static __inline __uint32_t 117 __bswap32_var(__uint32_t v) 118 { 119 __uint32_t ret; 120 121 __asm __volatile("rev32 %x0, %x1\n" 122 : "=&r" (ret), "+r" (v)); 123 124 return (ret); 125 } 126 127 static __inline __uint16_t 128 __bswap16_var(__uint16_t v) 129 { 130 __uint32_t ret; 131 132 __asm __volatile("rev16 %w0, %w1\n" 133 : "=&r" (ret), "+r" (v)); 134 135 return ((__uint16_t)ret); 136 } 137 #else 138 #error "Only AArch32 or AArch64 supported" 139 #endif /* AARCH32 */ 140 141 #ifdef __OPTIMIZE__ 142 143 #define __bswap32_constant(x) \ 144 ((((x) & 0xff000000U) >> 24) | \ 145 (((x) & 0x00ff0000U) >> 8) | \ 146 (((x) & 0x0000ff00U) << 8) | \ 147 (((x) & 0x000000ffU) << 24)) 148 149 #define __bswap16_constant(x) \ 150 ((((x) & 0xff00) >> 8) | \ 151 (((x) & 0x00ff) << 8)) 152 153 #define __bswap16(x) \ 154 ((__uint16_t)(__builtin_constant_p(x) ? \ 155 __bswap16_constant(x) : \ 156 __bswap16_var(x))) 157 158 #define __bswap32(x) \ 159 ((__uint32_t)(__builtin_constant_p(x) ? \ 160 __bswap32_constant(x) : \ 161 __bswap32_var(x))) 162 163 #else 164 #define __bswap16(x) __bswap16_var(x) 165 #define __bswap32(x) __bswap32_var(x) 166 167 #endif /* __OPTIMIZE__ */ 168 #endif /* !_MACHINE_ENDIAN_H_ */ 169
