1 /* 2 * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch.h> 8 #include <arch_helpers.h> 9 #include <arm_def.h> 10 #include <assert.h> 11 #include <bl_common.h> 12 #include <console.h> 13 #include <debug.h> 14 #include <mmio.h> 15 #include <plat_arm.h> 16 #include <platform.h> 17 18 #define BL31_END (uintptr_t)(&__BL31_END__) 19 20 /* 21 * Placeholder variables for copying the arguments that have been passed to 22 * BL31 from BL2. 23 */ 24 static entry_point_info_t bl32_image_ep_info; 25 static entry_point_info_t bl33_image_ep_info; 26 27 28 /* Weak definitions may be overridden in specific ARM standard platform */ 29 #pragma weak bl31_early_platform_setup 30 #pragma weak bl31_platform_setup 31 #pragma weak bl31_plat_arch_setup 32 #pragma weak bl31_plat_get_next_image_ep_info 33 34 35 /******************************************************************************* 36 * Return a pointer to the 'entry_point_info' structure of the next image for the 37 * security state specified. BL33 corresponds to the non-secure image type 38 * while BL32 corresponds to the secure image type. A NULL pointer is returned 39 * if the image does not exist. 40 ******************************************************************************/ 41 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 42 { 43 entry_point_info_t *next_image_info; 44 45 assert(sec_state_is_valid(type)); 46 next_image_info = (type == NON_SECURE) 47 ? &bl33_image_ep_info : &bl32_image_ep_info; 48 /* 49 * None of the images on the ARM development platforms can have 0x0 50 * as the entrypoint 51 */ 52 if (next_image_info->pc) 53 return next_image_info; 54 else 55 return NULL; 56 } 57 58 /******************************************************************************* 59 * Perform any BL31 early platform setup common to ARM standard platforms. 60 * Here is an opportunity to copy parameters passed by the calling EL (S-EL1 61 * in BL2 & S-EL3 in BL1) before they are lost (potentially). This needs to be 62 * done before the MMU is initialized so that the memory layout can be used 63 * while creating page tables. BL2 has flushed this information to memory, so 64 * we are guaranteed to pick up good data. 65 ******************************************************************************/ 66 #if LOAD_IMAGE_V2 67 void arm_bl31_early_platform_setup(void *from_bl2, 68 void *plat_params_from_bl2) 69 #else 70 void arm_bl31_early_platform_setup(bl31_params_t *from_bl2, 71 void *plat_params_from_bl2) 72 #endif 73 { 74 /* Initialize the console to provide early debug support */ 75 console_init(PLAT_ARM_BOOT_UART_BASE, PLAT_ARM_BOOT_UART_CLK_IN_HZ, 76 ARM_CONSOLE_BAUDRATE); 77 78 #if RESET_TO_BL31 79 /* There are no parameters from BL2 if BL31 is a reset vector */ 80 assert(from_bl2 == NULL); 81 assert(plat_params_from_bl2 == NULL); 82 83 #ifdef BL32_BASE 84 /* Populate entry point information for BL32 */ 85 SET_PARAM_HEAD(&bl32_image_ep_info, 86 PARAM_EP, 87 VERSION_1, 88 0); 89 SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); 90 bl32_image_ep_info.pc = BL32_BASE; 91 bl32_image_ep_info.spsr = arm_get_spsr_for_bl32_entry(); 92 #endif /* BL32_BASE */ 93 94 /* Populate entry point information for BL33 */ 95 SET_PARAM_HEAD(&bl33_image_ep_info, 96 PARAM_EP, 97 VERSION_1, 98 0); 99 /* 100 * Tell BL31 where the non-trusted software image 101 * is located and the entry state information 102 */ 103 bl33_image_ep_info.pc = plat_get_ns_image_entrypoint(); 104 105 bl33_image_ep_info.spsr = arm_get_spsr_for_bl33_entry(); 106 SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); 107 108 #else /* RESET_TO_BL31 */ 109 110 /* 111 * In debug builds, we pass a special value in 'plat_params_from_bl2' 112 * to verify platform parameters from BL2 to BL31. 113 * In release builds, it's not used. 114 */ 115 assert(((unsigned long long)plat_params_from_bl2) == 116 ARM_BL31_PLAT_PARAM_VAL); 117 118 # if LOAD_IMAGE_V2 119 /* 120 * Check params passed from BL2 should not be NULL, 121 */ 122 bl_params_t *params_from_bl2 = (bl_params_t *)from_bl2; 123 assert(params_from_bl2 != NULL); 124 assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 125 assert(params_from_bl2->h.version >= VERSION_2); 126 127 bl_params_node_t *bl_params = params_from_bl2->head; 128 129 /* 130 * Copy BL33 and BL32 (if present), entry point information. 131 * They are stored in Secure RAM, in BL2's address space. 132 */ 133 while (bl_params) { 134 if (bl_params->image_id == BL32_IMAGE_ID) 135 bl32_image_ep_info = *bl_params->ep_info; 136 137 if (bl_params->image_id == BL33_IMAGE_ID) 138 bl33_image_ep_info = *bl_params->ep_info; 139 140 bl_params = bl_params->next_params_info; 141 } 142 143 if (bl33_image_ep_info.pc == 0) 144 panic(); 145 146 # else /* LOAD_IMAGE_V2 */ 147 148 /* 149 * Check params passed from BL2 should not be NULL, 150 */ 151 assert(from_bl2 != NULL); 152 assert(from_bl2->h.type == PARAM_BL31); 153 assert(from_bl2->h.version >= VERSION_1); 154 155 /* 156 * Copy BL32 (if populated by BL2) and BL33 entry point information. 157 * They are stored in Secure RAM, in BL2's address space. 158 */ 159 if (from_bl2->bl32_ep_info) 160 bl32_image_ep_info = *from_bl2->bl32_ep_info; 161 bl33_image_ep_info = *from_bl2->bl33_ep_info; 162 163 # endif /* LOAD_IMAGE_V2 */ 164 #endif /* RESET_TO_BL31 */ 165 } 166 167 #if LOAD_IMAGE_V2 168 void bl31_early_platform_setup(void *from_bl2, 169 void *plat_params_from_bl2) 170 #else 171 void bl31_early_platform_setup(bl31_params_t *from_bl2, 172 void *plat_params_from_bl2) 173 #endif 174 { 175 arm_bl31_early_platform_setup(from_bl2, plat_params_from_bl2); 176 177 /* 178 * Initialize Interconnect for this cluster during cold boot. 179 * No need for locks as no other CPU is active. 180 */ 181 plat_arm_interconnect_init(); 182 183 /* 184 * Enable Interconnect coherency for the primary CPU's cluster. 185 * Earlier bootloader stages might already do this (e.g. Trusted 186 * Firmware's BL1 does it) but we can't assume so. There is no harm in 187 * executing this code twice anyway. 188 * Platform specific PSCI code will enable coherency for other 189 * clusters. 190 */ 191 plat_arm_interconnect_enter_coherency(); 192 } 193 194 /******************************************************************************* 195 * Perform any BL31 platform setup common to ARM standard platforms 196 ******************************************************************************/ 197 void arm_bl31_platform_setup(void) 198 { 199 /* Initialize the GIC driver, cpu and distributor interfaces */ 200 plat_arm_gic_driver_init(); 201 plat_arm_gic_init(); 202 203 #if RESET_TO_BL31 204 /* 205 * Do initial security configuration to allow DRAM/device access 206 * (if earlier BL has not already done so). 207 */ 208 plat_arm_security_setup(); 209 210 #endif /* RESET_TO_BL31 */ 211 212 /* Enable and initialize the System level generic timer */ 213 mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF, 214 CNTCR_FCREQ(0) | CNTCR_EN); 215 216 /* Allow access to the System counter timer module */ 217 arm_configure_sys_timer(); 218 219 /* Initialize power controller before setting up topology */ 220 plat_arm_pwrc_setup(); 221 } 222 223 /******************************************************************************* 224 * Perform any BL31 platform runtime setup prior to BL31 exit common to ARM 225 * standard platforms 226 ******************************************************************************/ 227 void arm_bl31_plat_runtime_setup(void) 228 { 229 /* Initialize the runtime console */ 230 console_init(PLAT_ARM_BL31_RUN_UART_BASE, PLAT_ARM_BL31_RUN_UART_CLK_IN_HZ, 231 ARM_CONSOLE_BAUDRATE); 232 } 233 234 void bl31_platform_setup(void) 235 { 236 arm_bl31_platform_setup(); 237 } 238 239 void bl31_plat_runtime_setup(void) 240 { 241 arm_bl31_plat_runtime_setup(); 242 } 243 244 /******************************************************************************* 245 * Perform the very early platform specific architectural setup shared between 246 * ARM standard platforms. This only does basic initialization. Later 247 * architectural setup (bl31_arch_setup()) does not do anything platform 248 * specific. 249 ******************************************************************************/ 250 void arm_bl31_plat_arch_setup(void) 251 { 252 arm_setup_page_tables(BL31_BASE, 253 BL31_END - BL31_BASE, 254 BL_CODE_BASE, 255 BL_CODE_END, 256 BL_RO_DATA_BASE, 257 BL_RO_DATA_END 258 #if USE_COHERENT_MEM 259 , BL_COHERENT_RAM_BASE, 260 BL_COHERENT_RAM_END 261 #endif 262 ); 263 enable_mmu_el3(0); 264 } 265 266 void bl31_plat_arch_setup(void) 267 { 268 arm_bl31_plat_arch_setup(); 269 } 270
